Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.
1. A system, comprising: a display panel comprising a frame buffer and decoder circuitry arranged to decode an encoded plurality of images to generate an image bit stream comprising a plurality of images, the display panel to display the plurality of images based on the image bit stream; and a host device coupled to the display panel, the host device comprising a processor and host memory, the host memory comprising the plurality of images and instructions, the instructions when executed by the processor cause the processor to: encode the plurality of images; store the encoded plurality of images in the frame buffer; configure the display panel to display the plurality of images in a sequence while the host device is in a low power state; send at least one command to the display panel to indicate at least one of a display order of the plurality of images, a period to display each of the plurality of images, a location of each of the encoded plurality of images in the frame buffer, or an encoding scheme corresponding to the encoded plurality of images; and place at least the processor in a low power state.
This invention relates to a low-power display system for devices such as smartphones, tablets, or other portable electronics. The system addresses the problem of reducing power consumption in display panels while maintaining functionality, particularly during idle or low-activity states. Traditional displays often rely on continuous processing by the host device, which consumes significant power. This invention mitigates that issue by offloading display management to the display panel itself, allowing the host device to enter a low-power state. The system includes a display panel with a frame buffer and decoder circuitry. The decoder circuitry decodes a set of pre-encoded images stored in the frame buffer and generates an image bit stream for display. The host device, which includes a processor and memory, encodes the images and stores them in the frame buffer. The host device then sends commands to the display panel to specify the display sequence, duration for each image, their locations in the frame buffer, and the encoding scheme used. Once configured, the display panel autonomously displays the images in sequence while the host device remains in a low-power state, conserving energy. This approach enables continuous display functionality without active host processing, making it ideal for screensavers, notifications, or other low-power display scenarios.
2. The system of claim 1 , the display panel comprising a display controller and a display backplane coupled to the display controller, the display controller to receive the image bit stream and cause the display backplane to illuminate one or more pixels based on the image bit stream.
A system for displaying images includes a display panel with a display controller and a display backplane. The display controller receives an image bit stream and processes it to generate control signals. The display backplane, which is coupled to the display controller, receives these signals and illuminates one or more pixels in response. The illumination of pixels is based on the data contained in the image bit stream, allowing the display panel to render the image. The display controller may include circuitry for decoding the image bit stream and converting it into a format compatible with the display backplane. The display backplane may include an array of pixels, each pixel capable of emitting light at different intensities or colors to form the displayed image. The system ensures accurate and efficient image rendering by coordinating the display controller and backplane to interpret and display the image data correctly. This approach improves display performance by ensuring precise control over pixel illumination based on the input bit stream.
3. The system of claim 1 , wherein the command is in accordance with one of a mobile industry processor interface (MIPI) display serial interface (DSI) standards, one of a high definition multimedia interface standards, or one of a DisplayPort standards.
4. The system of claim 1 , the display panel comprising sequencer circuitry, the sequencer circuitry to: determine an order to display the plurality of images based in part on the display order; send a first control signal to the decoder including an indication to decode a first one of the encoded plurality of images based on the determined order; and send, after the period, a second control signal to the decoder including an indication to decode a second one of the encoded plurality of images based on the determined order.
5. The system of claim 1 , comprising a display interconnect, the display panel and the host device coupled via the display interconnect.
6. The system of claim 5 , the display interconnect comprising a mobile industry processor interface (MIPI) display serial interface (DSI) interconnect.
7. At least one non-transitory machine-readable storage medium comprising instructions that when executed by a processor at a host device coupled to a display panel via a display interconnect, cause the processor to: encode a plurality of images based in part on an encoding scheme; store the encoded plurality of images in a frame buffer of the display panel; configure the display panel to display the encoded plurality of images in a specified sequence while the host device is in a low power state; send at least one command to the display panel to indicate at least one of a display order of the plurality of images, a period to display each of the plurality of images, a location of each of the encoded plurality of images in the frame buffer, or an encoding scheme corresponding to the encoded plurality of images; and place at least the processor of the host device in a low power state, wherein decoder circuitry at the display panel is arranged to decode the encoded plurality of images to generate an image bit stream comprising the plurality of images, the display panel to display the plurality of images based on the image bit stream.
8. The at least one non-transitory machine-readable storage medium of claim 7 , comprising instructions that further cause the processor to send at least one command to the display panel to indicate at least one of the specified sequence, a period to display each of the encoded plurality of images, a location of each of the encoded plurality of images in the frame buffer, or the encoding scheme.
This invention relates to a system for managing the display of encoded images on a display panel. The problem addressed is the efficient and accurate rendering of multiple encoded images within a frame buffer, ensuring proper timing, positioning, and decoding of the images. The system includes a processor and a non-transitory machine-readable storage medium containing instructions that, when executed, cause the processor to perform specific functions. These functions include encoding a plurality of images into a frame buffer, where each image is encoded using a specified encoding scheme. The system also determines a sequence in which the encoded images are to be displayed and calculates a period for displaying each image. Additionally, the system sends at least one command to the display panel to indicate the sequence, the display period for each image, the location of each image in the frame buffer, or the encoding scheme used. This ensures that the display panel can correctly decode and render the images in the intended order and timing. The invention improves the efficiency and accuracy of displaying multiple encoded images by providing clear instructions to the display panel regarding the sequence, timing, positioning, and decoding of the images.
9. The at least one non-transitory machine-readable storage medium of claim 8 , wherein the command is in accordance with one of a mobile industry processor interface (MIPI) display serial interface (DSI) standards.
10. A display panel apparatus, comprising: a frame buffer, the frame buffer arranged to receive a plurality of encoded images from a host device processor; sequencer circuitry arranged to: determine an order to display the plurality of encoded images based in part on configuration information received from the host device processor; and determine a period to display each of the plurality of encoded images based in part on the configuration information; and decoder circuitry arranged to: decode a first one of the plurality of encoded images to generate a first image bitstream, the first one of the plurality of encoded images based on the determined order; and send the first image bitstream to a display controller including an indication to display the decoded first one of the plurality of encoded images based on the first image bit-stream.
11. The display panel apparatus of claim 10 , the decoder circuitry further arranged to: decode a second one of the plurality of encoded images to generate a second image bitstream, the second one of the plurality of encoded images based on the determined order; and send, after a time corresponding the period, the second image bitstream to the display controller including an indication to display the decoded second one of the plurality of encoded images based on the second image bit-stream.
This invention relates to a display panel apparatus for managing the display of multiple encoded images in a specific order. The apparatus includes decoder circuitry that decodes a first encoded image from a plurality of encoded images to generate a first image bitstream. The decoder circuitry then sends this bitstream to a display controller, which displays the decoded image. The decoder circuitry also determines an order for decoding the remaining encoded images. After a predetermined period, the decoder circuitry decodes a second encoded image from the plurality, based on the determined order, to generate a second image bitstream. This second bitstream is then sent to the display controller, which displays the decoded second image. The apparatus ensures sequential display of images in a controlled manner, allowing for synchronized or timed presentation of multiple images. The decoder circuitry may also handle additional encoded images in the same sequence, ensuring consistent display timing. This invention is useful in applications requiring precise image sequencing, such as video playback, animations, or synchronized displays in multimedia systems.
12. The display panel apparatus of claim 10 , comprising the display controller.
A display panel apparatus includes a display controller that dynamically adjusts display parameters based on environmental conditions. The apparatus is designed for electronic devices such as smartphones, tablets, or laptops, where maintaining optimal display performance under varying lighting and usage scenarios is critical. The display controller monitors ambient light levels, device orientation, and user interaction patterns to automatically adjust brightness, contrast, and color temperature. This ensures energy efficiency while preserving visual quality. The apparatus may also incorporate sensors to detect environmental factors like temperature and humidity, which can affect display performance. The display controller processes sensor data in real-time to apply predefined or learned adjustment algorithms, enhancing user experience and extending battery life. The system may further include a user interface allowing manual overrides or customization of adjustment settings. The apparatus is particularly useful in portable devices where power consumption and display adaptability are key concerns.
13. The display panel apparatus of claim 10 , the sequencer arranged to receive commands from the host device processor, at least one of the commands including an indication of the order.
14. The display panel apparatus of claim 13 , at least one other of the commands including an indication of the period.
15. The display panel apparatus of claim 13 , at least one other of the commands including an indication of an encoding scheme with which the plurality of images are encoded, the decoder to decode the first one of the plurality of encoded images based in part on the encoding scheme.
This invention relates to a display panel apparatus designed to process and display encoded image data. The apparatus addresses the challenge of efficiently decoding and displaying multiple images encoded with different schemes, ensuring compatibility and smooth playback across various display systems. The apparatus includes a decoder that receives a plurality of encoded images and processes them based on embedded command data. At least one of these commands specifies the encoding scheme used for the images, allowing the decoder to accurately reconstruct the images before display. The apparatus ensures that the first image in the sequence is decoded correctly by referencing the indicated encoding scheme, which may include formats like JPEG, PNG, or proprietary encodings. This approach optimizes performance by avoiding redundant decoding steps and ensuring real-time display capabilities. The system is particularly useful in applications requiring dynamic content updates, such as digital signage, video streaming, or interactive displays, where multiple encoded images must be processed sequentially with minimal latency. The apparatus may also include additional commands to control display parameters, such as resolution or refresh rate, further enhancing flexibility in image rendering. By integrating encoding scheme detection into the command structure, the invention simplifies the decoding process and improves compatibility across different image sources and display technologies.
16. The display panel apparatus of claim 13 , wherein the commands comprise mobile industry processor interface (MIPI) display serial interface (DSI) commands.
17. The display panel apparatus of claim 13 , comprising at least one configuration register, the at least one configuration register to be set responsive, at least in part, to assertion of one of the commands by the host device processor.
18. The display panel apparatus of claim 13 , the decoder to decode the first one of the plurality of encoded images based responsive, at least in part, to assertion of one of the commands by the host device processor.
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March 23, 2021
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