Patentable/Patents/US-10504895
US-10504895

FinFET isolation structure and method for fabricating the same

PublishedDecember 10, 2019
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A semiconductor device includes a semiconductor substrate, a first semiconductor fin, a second semiconductor fin, an air gap and a dielectric cap layer. The first semiconductor fin is disposed on the semiconductor substrate, and the second semiconductor fin is disposed on the semiconductor substrate. The air gap is located between the first semiconductor fin and the second semiconductor fin, and the dielectric cap layer caps a top of the air gap.

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Patent Metadata

Filing Date

January 24, 2017

Publication Date

December 10, 2019

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Cite as: Patentable. “FinFET isolation structure and method for fabricating the same” (US-10504895). https://patentable.app/patents/US-10504895

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