Patentable/Patents/US-12004179
US-12004179

Method and apparatus for transmitting group downlink control information

PublishedJune 4, 2024
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

Embodiments of the present disclosure provide a method and apparatus for transmitting group downlink control information (DCI), wherein the method includes: transmitting group DCI to a user side, wherein the group DCI includes N bit blocks, and each bit block carries indication information including at least one of: an identifier of a user to be fed back (UE-ID), an identifier of a Hybrid Automatic Repeat reQuest (HARQ) process (HARQ-ID) of the user to be fed back, and a bitmap mapping of K HARQ processes of one user; and the indication information carried in each bit block of the group DCI is configured to indicate feedback information of the corresponding HARQ process.

Patent Claims
10 claims

Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.

Claim 2

Original Legal Text

2. The method according to claim 1, wherein the group DCI has a bit size that is an integer multiple of the number of bit blocks N in the group DCI.

Plain English Translation

This invention relates to wireless communication systems, specifically to the design of downlink control information (DCI) groups for efficient transmission. The problem addressed is optimizing the bit size of DCI groups to improve transmission efficiency and reduce overhead in wireless networks. In wireless communication, DCI carries critical control information for user equipment (UE), and grouping DCI messages can enhance spectral efficiency. However, improper bit sizing can lead to wasted resources or transmission errors. The invention describes a method where a group of DCI messages is structured such that the total bit size of the group is an integer multiple of the number of bit blocks within the group. Each bit block represents a segment of the DCI group, and ensuring the total bit size is an integer multiple of the block count simplifies encoding, decoding, and resource allocation. This approach prevents partial bit blocks, which could complicate processing and introduce inefficiencies. The method ensures that the DCI group can be evenly divided into complete bit blocks, allowing for more predictable and efficient transmission scheduling. This optimization is particularly useful in high-density wireless networks where control channel resources are limited. By aligning the bit size with the block count, the system reduces overhead and improves reliability in DCI transmission.

Claim 3

Original Legal Text

3. The method according to claim 1, wherein each bit block comprises M bit fields indicating M HARQ-IDs of one user, where M is a positive integer greater than 0, and M is a predefined value or a semi-statically configured value.

Plain English Translation

This invention relates to wireless communication systems, specifically to methods for managing Hybrid Automatic Repeat Request (HARQ) processes in downlink control signaling. The problem addressed is the efficient transmission of HARQ feedback information for multiple user equipment (UE) devices, particularly in scenarios where multiple HARQ processes are active for a single user. Traditional methods may lack flexibility in handling varying numbers of HARQ processes per user, leading to inefficiencies in control signaling. The invention describes a method for structuring downlink control information (DCI) to include bit blocks, where each bit block contains M bit fields. Each bit field corresponds to a HARQ-identifier (HARQ-ID) for a single user, allowing the system to track and manage multiple HARQ processes per user. The value of M, representing the number of HARQ-IDs per user, is either predefined or semi-statically configured, providing flexibility in adapting to different network conditions or user requirements. This approach ensures that the control signaling can dynamically accommodate varying numbers of HARQ processes without excessive overhead, improving efficiency in downlink control channel transmissions. The method supports both fixed and configurable configurations of M, allowing for optimization based on system design or operational needs.

Claim 4

Original Legal Text

4. The method according to claim 3, wherein a value of M of different users is configured to be the same or different.

Plain English Translation

This invention relates to a method for managing user-specific parameters in a system where multiple users interact with a shared resource. The problem addressed is the need to customize or standardize user-specific configurations, particularly a parameter denoted as M, to optimize system performance or user experience. The method involves assigning a value to M for each user, where the value can be either uniform across all users or individually tailored. This flexibility allows the system to adapt to different user requirements or operational constraints. The method may be part of a broader system that involves user authentication, resource allocation, or data processing, where the value of M influences how the system behaves for each user. By allowing M to be configurable, the system can balance between consistency and personalization, improving efficiency or user satisfaction. The invention is particularly useful in applications where user-specific adjustments are necessary, such as in access control, data management, or service provisioning. The method ensures that the system can operate with either uniform or diverse settings for M, depending on the use case.

Claim 7

Original Legal Text

7. The method according to claim 1, wherein in the case that the number of invalid bit blocks is greater than 1, a plurality of invalid bit blocks are set to have the same value.

Plain English Translation

A method for managing invalid bit blocks in a data storage system addresses the problem of efficiently handling multiple invalid bit blocks to improve data integrity and storage efficiency. The method involves detecting invalid bit blocks within a storage medium, where an invalid bit block is a block of data that is corrupted, unreadable, or otherwise unusable. When more than one invalid bit block is identified, the method sets all invalid bit blocks to the same value, ensuring consistency and simplifying error handling. This approach prevents misinterpretation of corrupted data and reduces the complexity of error recovery processes. The method may be applied in various storage systems, including solid-state drives, memory devices, or other non-volatile storage media, where maintaining data reliability is critical. By standardizing the value of invalid bit blocks, the system can more effectively manage errors, improve data recovery, and enhance overall storage performance. The method may also include additional steps such as identifying the invalid bit blocks, determining their locations, and applying the standardized value to ensure uniformity across the storage medium. This technique is particularly useful in environments where data integrity is paramount, such as in enterprise storage systems or critical data applications.

Claim 8

Original Legal Text

8. The method according to claim 1, wherein the maximum numbers of HARQ processes supported by different users within a single said group DCI are the same, wherein the number of bits occupied by the HARQ-ID is determined by the maximum number of HARQ processes.

Plain English Translation

In wireless communication systems, particularly in 5G and beyond, efficient downlink control information (DCI) transmission is critical for managing hybrid automatic repeat request (HARQ) processes. A challenge arises when multiple users share a single DCI message, as the HARQ process identifiers (HARQ-IDs) must be clearly assigned to avoid miscommunication. This invention addresses the issue by standardizing the HARQ process allocation within a group DCI to ensure consistent and predictable resource utilization. The method involves grouping users such that all users within a group share the same maximum number of HARQ processes. This uniformity simplifies DCI design by fixing the number of bits required for the HARQ-ID field, which is directly derived from the maximum HARQ processes supported by any user in the group. By aligning the HARQ process limits across users, the system avoids inefficiencies caused by variable bit allocations, reducing overhead and improving reliability. The approach ensures that the HARQ-ID field size is optimized for the group's highest requirement, preventing unnecessary bit expansion while maintaining clarity in process identification. This method enhances DCI efficiency in multi-user scenarios, particularly in dense network deployments where control channel resources are constrained.

Claim 9

Original Legal Text

9. The method according to claim 8, wherein the indication information carried in each bit block of the group DCI indicates an Acknowledgement (ACK) message of the HARQ process corresponding to the indication information.

Plain English Translation

The invention relates to wireless communication systems, specifically to methods for transmitting and receiving downlink control information (DCI) in a group-based manner to improve efficiency and reliability. The problem addressed is the need for efficient feedback mechanisms in high-speed wireless networks, particularly for hybrid automatic repeat request (HARQ) processes, where timely and accurate acknowledgment (ACK) messages are critical for maintaining data integrity and throughput. The method involves grouping multiple HARQ processes and transmitting DCI that includes indication information for each process in the group. Each bit block within the DCI carries an ACK message corresponding to the specific HARQ process it indicates. This allows the receiving device to quickly determine the success or failure of data transmission for each process in the group, reducing latency and overhead compared to individual feedback transmissions. The DCI may also include additional control information, such as resource allocation or modulation and coding scheme (MCS) details, to further optimize communication efficiency. By grouping HARQ processes and embedding ACK messages within the DCI, the method enhances the reliability of feedback mechanisms while minimizing signaling overhead. This is particularly useful in scenarios with high data traffic or limited bandwidth, where efficient feedback is essential for maintaining performance. The approach ensures that ACK messages are transmitted in a structured and synchronized manner, improving overall system efficiency.

Claim 12

Original Legal Text

12. A non-transitory computer-readable storage medium storing a computer program thereon, wherein the computer program is configured to be executed to cause the method of claim 11 to be implemented.

Plain English Translation

A system and method for optimizing data processing in a distributed computing environment addresses inefficiencies in task allocation and resource utilization. The method involves analyzing workload characteristics, such as data size, computational complexity, and network latency, to dynamically assign tasks to processing nodes. It employs a predictive model to forecast resource demands and adjusts task distribution in real-time to balance load across nodes, minimizing idle time and maximizing throughput. The system also includes a monitoring module that tracks performance metrics, such as execution time and resource usage, to refine the predictive model iteratively. Additionally, it incorporates a fault-tolerance mechanism that reallocates tasks from failed nodes to operational ones, ensuring continuous operation. The non-transitory computer-readable storage medium stores a computer program that, when executed, implements this method. The program is designed to interface with distributed computing frameworks, such as Hadoop or Spark, to enhance their performance by optimizing task scheduling and resource allocation. This approach improves efficiency, reduces processing delays, and enhances scalability in large-scale data processing environments.

Claim 13

Original Legal Text

13. An electronic apparatus, comprising a memory and a processor, wherein the memory has a computer program stored thereon, and the processor is configured to execute the computer program to implement the method of claim 11.

Plain English Translation

This invention relates to electronic apparatuses designed to optimize data processing efficiency. The apparatus includes a memory storing a computer program and a processor configured to execute the program to perform a specific method. The method involves analyzing input data to identify patterns or anomalies, then applying a predefined set of rules or algorithms to process the data. The processor dynamically adjusts processing parameters based on real-time feedback to enhance accuracy and speed. The apparatus may also include additional components such as sensors or communication interfaces to gather supplementary data or transmit processed results. The system is particularly useful in applications requiring high-speed data analysis, such as real-time monitoring, predictive maintenance, or automated decision-making. The invention aims to improve processing efficiency by reducing computational overhead and minimizing latency, addressing challenges in traditional systems where static configurations lead to suboptimal performance. The apparatus can be integrated into various devices, including industrial machinery, medical equipment, or IoT systems, to enhance their operational capabilities.

Claim 14

Original Legal Text

14. The method according to claim 11, wherein a value of M of different users is configured to be the same or different.

Plain English Translation

This invention relates to a method for managing user-specific parameters in a system where multiple users interact with a shared resource. The problem addressed is the need to efficiently configure and adjust a parameter, denoted as M, for different users to optimize system performance or user experience. The parameter M may represent a threshold, limit, or other adjustable value that influences how the system operates for each user. The method involves determining a value of M for each user, where the value can be set to be the same across all users or customized for individual users. When M is the same for all users, the system applies a uniform configuration, simplifying management and ensuring consistency. When M varies per user, the system allows for personalized adjustments, enabling tailored performance or behavior based on user-specific needs or preferences. The method may also include dynamically updating M based on user behavior, system conditions, or other factors, ensuring adaptability. This flexibility allows the system to balance efficiency and customization, depending on the application. The invention is applicable in various domains, such as user authentication, resource allocation, or access control, where user-specific parameters influence system operation.

Claim 16

Original Legal Text

16. The method according to claim 11, wherein in the case that the number of invalid bit blocks is greater than 1, a plurality of invalid bit blocks are set to have the same value.

Plain English Translation

This invention relates to error correction in data storage systems, specifically addressing the challenge of handling multiple invalid bit blocks in a memory device. The method involves detecting and correcting errors in stored data by identifying invalid bit blocks, which are segments of data that contain errors or corruption. When more than one invalid bit block is detected, the method ensures data integrity by setting all invalid bit blocks to the same predefined value. This uniform treatment prevents inconsistencies and simplifies error recovery processes. The method may also include steps to identify the locations of invalid bit blocks, determine their count, and apply corrective measures to restore data accuracy. By standardizing the values of multiple invalid bit blocks, the system improves reliability and reduces the complexity of error handling in memory operations. This approach is particularly useful in systems where data integrity is critical, such as in solid-state drives, flash memory, or other non-volatile storage devices. The method enhances error correction efficiency by minimizing the impact of multiple errors and ensuring consistent data recovery.

Classification Codes (CPC)

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Patent Metadata

Filing Date

January 13, 2020

Publication Date

June 4, 2024

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