One or more embodiments relate to an apparatus comprising: a first transistor including a fin; and a second transistor including a fin, the fin of the first transistor having a lower charge carrier mobility than the fin of the second transistor.
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1. An apparatus comprising: a first transistor including a fin; and a second transistor including a fin, the fin of the first transistor having a lower charge carrier mobility than the fin of the second transistor, wherein the first transistor and the second transistor are of a same conductivity type.
The device includes two transistors, both of the same conductivity type (either both N-type or both P-type). Both transistors have a fin structure. The key difference is that one transistor's fin is designed to have lower charge carrier mobility compared to the fin of the other transistor. This means that electrons or holes will move more slowly through the first transistor's fin than through the second transistor's fin.
2. The apparatus of claim 1 , wherein a channel in the fin of the first transistor is doped and a channel in the fin of the second transistor is doped to a concentration substantially less than a concentration of a dopant of the first transistor.
Builds on the previous transistor design, where two transistors (same conductivity type, both with fins) exist, and one fin has lower charge carrier mobility than the other. To achieve this mobility difference, the channel region within the lower-mobility fin is intentionally doped. The second transistor's fin is also doped, but at a significantly lower concentration than the doping concentration in the first transistor's fin. The difference in doping levels affects how easily charge carriers can move through the channel.
3. The apparatus of claim 2 , wherein the channel of the first transistor is doped with a first dopant of a first polarity and is counter-doped with a second dopant of a second polarity opposite to the first polarity to a ratio of approximately 1:1.
Elaborating on the previous transistor design where two transistors (same conductivity type, both with fins) exist, and one fin has lower charge carrier mobility than the other due to doping. In this case, the first transistor's channel is doped with a first type of dopant (either N-type or P-type). It is then "counter-doped" with a second dopant of the opposite polarity. The ratio of these two dopants is approximately 1:1, meaning they largely cancel each other out. This counter-doping strategy is used to reduce the charge carrier mobility.
4. The apparatus of claim 1 , wherein the fin of the first transistor includes interstitials to reduce charge carrier mobility.
Refers to a two transistor design (same conductivity type, both with fins) where one fin has lower charge carrier mobility than the other. Instead of doping, this claim describes that the lower mobility fin contains "interstitials". Interstitials are extra atoms positioned within the crystal lattice of the fin material in locations where they don't normally belong. These extra atoms disrupt the regular lattice structure and scatter charge carriers, thus reducing their mobility.
5. The apparatus of claim 1 , wherein the fin of the first transistor includes an electrically non-active material to reduce charge carrier mobility.
In the apparatus that includes two transistors (same conductivity type, both with fins) and one fin having a lower charge carrier mobility than the other, this claim describes that the lower mobility fin contains an "electrically non-active material". This material doesn't contribute free charge carriers to the semiconductor and its presence interferes with the movement of the existing charge carriers, reducing their mobility within the fin.
6. The apparatus of claim 1 , wherein the fin of the first transistor includes a material selected from the group consisting of one or more of germanium (Ge) and carbon (C), in any combination.
In the apparatus that includes two transistors (same conductivity type, both with fins) and one fin having a lower charge carrier mobility than the other, this claim specifies that the lower mobility fin includes germanium (Ge), carbon (C), or a combination of both. The presence of these materials within the fin alters its material properties and scatters charge carriers, reducing their mobility.
7. The apparatus of claim 1 , wherein the fin of the first transistor includes additional surface states to reduce charge carrier mobility.
In the apparatus that includes two transistors (same conductivity type, both with fins) and one fin having a lower charge carrier mobility than the other, the lower mobility fin has additional "surface states". Surface states are electronic energy levels that exist at the surface of the semiconductor material of the fin. These surface states trap charge carriers and scatter them, thereby reducing the overall charge carrier mobility within the fin.
8. The apparatus of claim 7 , wherein the fin of the first transistor includes implants to damage a surface of the first one of the fins.
This elaborates on the previous transistor design, focusing on how to create the additional surface states to reduce charge carrier mobility of the first fin. It states that the surface of this fin is damaged using implants. Implants involve bombarding the surface with ions, which create defects and disruptions in the crystal lattice, creating these surface states.
9. The apparatus of claim 1 , wherein: the first transistor is a field effect transistor including a source, a drain, and a channel in the fin and a gate; and the second transistor is a field effect transistor including a source, a drain, and a channel in the fin and a gate.
The apparatus consists of two field-effect transistors (FETs), both having a source, drain, channel (within the fin), and a gate. Each transistor includes a fin. The transistors are of the same conductivity type, and the fin of the first transistor has a lower charge carrier mobility than the fin of the second transistor.
10. The apparatus of claim 1 , wherein: the first transistor includes a plurality of fins; and the second transistor includes a plurality of fins.
The apparatus incorporates two transistors (same conductivity type) where one has a lower charge carrier mobility than the other. This configuration utilizes multiple fins for each transistor. Both the first transistor (with the lower charge carrier mobility) and the second transistor (with the higher mobility) consist of a plurality of fins.
11. The apparatus of claim 1 , wherein the first transistor and the second transistor are of n-type conductivity.
The apparatus includes two transistors, where the first transistor has a fin with lower charge carrier mobility than the fin of the second transistor. Both transistors are of n-type conductivity. This means the transistors conduct electricity primarily through the movement of electrons.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
May 16, 2012
July 16, 2013
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