A method for electrofilling large, high aspect ratio recessed features with copper without depositing substantial amounts of copper in the field region is provided. The method allows completely filling recessed features having aspect ratios of at least about 5:1 such as at least about 10:1, and widths of at least about 1 μm in a substantially void-free manner without depositing more than 5% of copper in the field region (relative to the thickness deposited in the recessed feature). The method involves contacting the substrate having one or more large, high aspect ratio recessed features (such as a TSVs) with an electrolyte comprising copper ions and an organic dual state inhibitor (DSI) configured for inhibiting copper deposition in the field region, and electrodepositing copper under potential-controlled conditions, where the potential is controlled not exceed the critical potential of the DSI.
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1. An electroplating apparatus, comprising a controller with program instructions for electroplating metal in a recessed feature on a semiconductor substrate, wherein the program instructions for electroplating metal comprise instructions for: (a) contacting the semiconductor substrate with an electroplating solution comprising metal ions and an organic dual state inhibitor (DSI) in an electroplating cell; and (b) electrically biasing the semiconductor substrate under potential-controlled conditions and below a critical potential of the DSI, while the semiconductor substrate is contacted with the electroplating solution to electrodeposit metal in the recessed feature such that after filling the recessed feature, the ratio of the metal layer thickness deposited on the field to the metal layer thickness deposited in the recessed feature is not greater than about 0.05, wherein the DSI is configured for inhibiting metal deposition in a field region of the semiconductor substrate and is characterized by a cyclic voltammogram having an inflection point between a first region exhibiting minimal current change with potential change and a second region exhibiting a large current change with potential change, the inflection point corresponding to the critical potential.
An electroplating system plates metal into small holes (recessed features) on silicon wafers. A computer controls the electroplating process. The computer program first immerses the wafer in a solution with metal ions (like copper) and a special organic chemical (DSI). This DSI prevents metal from plating on the flat areas of the wafer. Then, the program applies a voltage to the wafer, plating metal only inside the recessed feature. The voltage is kept below a specific value (critical potential) of the DSI. This ensures that after the hole is filled, very little metal (less than 5%) plates on the flat areas outside the holes. The DSI's effectiveness changes sharply at its critical potential, as seen in a cyclic voltammogram.
2. The apparatus of claim 1 , wherein the metal is copper.
The electroplating system, as previously described for plating metal in small holes on silicon wafers using a computer-controlled process and a dual-state inhibitor (DSI), specifically uses copper as the metal being plated into the recessed feature. This means the electroplating solution contains copper ions, and the copper is selectively deposited into the holes while the DSI prevents copper deposition on the field regions of the wafer by keeping the voltage below a critical potential of the DSI.
3. The apparatus of claim 1 , wherein the recessed feature is a through silicon via (TSV).
The electroplating system, as previously described for plating metal in small holes on silicon wafers using a computer-controlled process and a dual-state inhibitor (DSI), is designed to fill Through Silicon Vias (TSVs). TSVs are vertical connections through the silicon wafer. The system selectively deposits metal, such as copper, into these TSVs using an electroplating solution and a DSI that inhibits metal deposition on the surrounding areas of the wafer by keeping the voltage below a critical potential of the DSI.
4. The apparatus of claim 1 , wherein the recessed feature has an aspect ratio of at least about 15:1.
The electroplating system, as previously described for plating metal in small holes on silicon wafers using a computer-controlled process and a dual-state inhibitor (DSI), is capable of filling very deep holes. Specifically, the recessed feature has an aspect ratio (depth divided by width) of at least 15:1 or higher. This means the hole is at least 15 times deeper than it is wide, requiring precise control of the electroplating process and effective inhibition of metal deposition on the surrounding areas of the wafer by keeping the voltage below a critical potential of the DSI.
5. The apparatus of claim 1 , wherein the apparatus comprises a reference electrode positioned in the proximity of the substrate that is configured to be used in controlling the potential during potential-controlled electroplating.
The electroplating system, as previously described for plating metal in small holes on silicon wafers using a computer-controlled process and a dual-state inhibitor (DSI), includes a reference electrode placed very close to the silicon wafer. This reference electrode is used to accurately measure and control the voltage applied to the wafer during electroplating. This precise voltage control, in conjunction with the DSI, ensures that the metal is selectively deposited inside the recessed feature while minimizing metal deposition on the surrounding areas of the wafer.
6. The apparatus of claim 5 , wherein the reference electrode is an unpolarized metal electrode comprising the same metal that is being electroplated.
The electroplating system, as previously described with a reference electrode near the wafer for voltage control, uses a reference electrode made of the same metal being plated. For example, when electroplating copper, the reference electrode is also made of copper. This unpolarized metal electrode provides a stable and accurate voltage reference, ensuring precise control of the electroplating process, especially when used with a dual-state inhibitor to selectively deposit metal into recessed features.
7. The apparatus of claim 5 , wherein the reference electrode is immersed into a solution that is substantially free of the DSI.
The electroplating system, as previously described with a reference electrode near the wafer for voltage control, uses a reference electrode immersed in a solution that does not contain the dual-state inhibitor (DSI). This ensures that the DSI doesn't interfere with the reference electrode's voltage measurement. The separate solution provides a cleaner, more stable reference, allowing for more precise control of the electroplating process, especially when used with a DSI to selectively deposit metal into recessed features.
8. The apparatus of claim 1 , wherein the dual-state inhibitor suppresses the current in the field region to less than about 2 mA/cm 2 .
The electroplating system, as previously described with a dual-state inhibitor (DSI) to selectively deposit metal into recessed features, is designed such that the DSI significantly reduces the metal plating current on the flat areas (field region) of the wafer. Specifically, the DSI suppresses the current in the field region to less than 2 mA/cm². This very low current indicates minimal metal deposition outside the recessed features, ensuring that the metal is selectively deposited where it's needed.
9. The apparatus of claim 1 , wherein the critical potential of the dual-state inhibitor is at least about −0.15 V versus the open circuit potential.
The electroplating system, as previously described with a dual-state inhibitor (DSI) to selectively deposit metal into recessed features, operates such that the DSI has a "critical potential" of at least -0.15V relative to the open circuit potential. This critical potential is the voltage at which the DSI stops effectively preventing metal deposition on the flat areas of the wafer. The system's voltage is kept below this critical potential to ensure selective metal plating within the recessed features.
10. The apparatus of claim 1 , wherein at about the critical potential the current increases at least 0.1 mA/cm 2 per 1 mV.
The electroplating system, as previously described with a dual-state inhibitor (DSI) to selectively deposit metal into recessed features, is designed such that, at approximately the critical potential of the DSI, the plating current increases sharply. Specifically, the current increases by at least 0.1 mA/cm² for every 1 mV increase in voltage. This sharp increase indicates that the DSI is no longer effectively inhibiting metal deposition on the flat areas of the wafer.
11. The apparatus of claim 1 , wherein the electroplating solution comprises copper ions at a concentration of at least about 40 g/L.
The electroplating system, as previously described for plating metal in small holes on silicon wafers using a computer-controlled process and a dual-state inhibitor (DSI), utilizes an electroplating solution with a high concentration of metal ions. Specifically, the electroplating solution contains at least 40 grams of copper ions per liter (40 g/L). This high concentration ensures a sufficient supply of metal ions for rapid and complete filling of the recessed features.
12. The apparatus of claim 1 , wherein the electroplating solution further comprises sulfuric and/or methanesulfonic acid at a concentration of at least about 40 g/L.
The electroplating system, as previously described for plating metal in small holes on silicon wafers using a computer-controlled process and a dual-state inhibitor (DSI), uses an electroplating solution containing acids. Specifically, the electroplating solution includes sulfuric acid, methanesulfonic acid, or a combination of both, at a concentration of at least 40 grams per liter (40 g/L). These acids increase the conductivity of the solution and help dissolve the metal ions, improving the electroplating process.
13. The apparatus of claim 1 , wherein the electroplating solution further comprises an electroplating accelerator, selected from the group consisting of 3-mercapto-1-propanesulfonic acid, bis-(3-sodiumsulfopropyldisulfide) (SPS), and N,N-dimethyl-dithiocarbamyl propylsulfonate (DPS).
The electroplating system, as previously described for plating metal in small holes on silicon wafers using a computer-controlled process and a dual-state inhibitor (DSI), uses an electroplating solution that includes an accelerator. This accelerator, chosen from chemicals like 3-mercapto-1-propanesulfonic acid, bis-(3-sodiumsulfopropyldisulfide) (SPS), or N,N-dimethyl-dithiocarbamyl propylsulfonate (DPS), speeds up the plating process within the recessed feature, ensuring faster and more efficient filling.
14. The apparatus of claim 1 , wherein the electroplating solution further comprises an electroplating suppressor, selected from the group consisting of polyethylene glycol (PEG) and polyethyleneoxide (PEO).
The electroplating system, as previously described for plating metal in small holes on silicon wafers using a computer-controlled process and a dual-state inhibitor (DSI), uses an electroplating solution that includes a suppressor. This suppressor, chosen from chemicals like polyethylene glycol (PEG) or polyethylene oxide (PEO), slows down the plating process on the flat areas of the wafer, complementing the effect of the DSI and further promoting selective metal deposition within the recessed feature.
15. The apparatus of claim 1 , wherein the DSI is a quaternary ammonium salt, which has at least one alkyl or aralkyl substituent with at least 7 carbon atoms.
The electroplating system, as previously described with a dual-state inhibitor (DSI) to selectively deposit metal into recessed features, uses a specific type of DSI. The DSI is a quaternary ammonium salt, which is a chemical compound with a central nitrogen atom bonded to four organic groups. At least one of these organic groups must be a long chain, having at least 7 carbon atoms, either in an alkyl or aralkyl configuration. This specific chemical structure provides the DSI with its dual-state inhibiting properties.
16. The apparatus of claim 1 , wherein the DSI is selected from the group consisting of a benzalkonium salt, a thonzonium salt, a dodecyltrimethylammonium salt, and benzyldimethylhexadecylammonium chloride (BDHAC).
The electroplating system, as previously described with a dual-state inhibitor (DSI) to selectively deposit metal into recessed features, uses a DSI selected from a specific group of chemicals. These chemicals include benzalkonium salts, thonzonium salts, dodecyltrimethylammonium salts, and benzyldimethylhexadecylammonium chloride (BDHAC). These specific chemicals have been found to be effective dual-state inhibitors, selectively preventing metal deposition on the flat areas of the wafer while allowing it to occur within the recessed feature.
17. The apparatus of claim 1 , wherein the program instructions comprise instructions for determining a plating endpoint by the current response from the substrate.
The electroplating system, as previously described for plating metal in small holes on silicon wafers using a computer-controlled process and a dual-state inhibitor (DSI), uses the electrical current flowing through the substrate to determine when the recessed feature is completely filled. The computer program monitors the current response from the substrate and identifies a specific change or pattern that indicates the plating endpoint. This allows for automatic and precise control of the plating process, preventing overplating and ensuring optimal results.
18. The apparatus of claim 1 , wherein the program instructions comprise instructions for electrically biasing the substrate within about 1 second after the substrate is contacted with the electroplating solution.
The electroplating system, as previously described for plating metal in small holes on silicon wafers using a computer-controlled process and a dual-state inhibitor (DSI), rapidly applies a voltage to the substrate after it is immersed in the electroplating solution. Specifically, the electrical bias is applied within about 1 second of the substrate contacting the solution. This quick application of voltage helps to initiate the plating process quickly and efficiently, before the DSI can fully block metal deposition on the flat areas of the wafer.
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February 20, 2015
March 14, 2017
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