A switching device includes a plurality of ports and a switching core, which is coupled to transfer data packets between ingress and egress ports. Switching logic maintains a descriptor queue containing respective descriptors corresponding to the data packets that have been received and queued by the ports, and responsively to the respective descriptors, instructs the switching core to transfer the queued data packets between the ports. Port logic, which is associated with each port, is configured, upon receipt of a data packet from the network at the port, to signal the switching logic to place a descriptor corresponding to the data packet in the descriptor queue and, upon identifying the data packet as meeting a predefined criterion, to convey a request to the switching logic, bypassing the descriptor queue, to instruct the switching core to transfer the data packet immediately to an egress port.
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1. A switching device, comprising: a plurality of ports, which are configured to serve as ingress and egress ports so as to receive, queue, and transmit data packets from and to a network; a switching core, which is coupled to transfer the data packets between the ingress and egress ports; switching logic, which is coupled to maintain a descriptor queue containing respective descriptors corresponding to the data packets that have been received and queued by the ports, to read the descriptors from the descriptor queue according to their turn in the descriptor queue, and to instruct the switching core to transfer the queued data packets referred to by the read descriptors, between the ports; and port logic associated with a specific one of the ports, configured to determine, upon receipt of a data packet from the network at the specific port, whether the data packet meets a predefined criterion, and responsive to determining that the data packet does not meet the predefined criterion: signal the switching logic to place a descriptor corresponding to the data packet in the descriptor queue, and responsive to identifying the data packet as meeting the predefined criterion, to: signal the switching logic to place a descriptor corresponding to the data packet in the descriptor queue, and convey a request to the switching logic, to instruct the switching core to begin to transfer the data packet immediately to an egress port, before the descriptor corresponding to the data packet is read and processed by the switching logic, wherein the conveying of the request to the switching logic is a separate act from the signaling of the switching logic to place a descriptor corresponding to the data packet in the descriptor queue, wherein the switching logic is configured to signal the corresponding descriptor in the descriptor queue as intended to be dropped, upon grant of the request to begin to transfer the data packet immediately, so that responsively to determining that the corresponding descriptor reaches a head of the descriptor queue the packet will not be transferred a second time.
A network switch speeds up data transfer. It has multiple ports for sending and receiving data packets. A "switching core" moves data between these ports. Normally, when a packet arrives, the switch puts a description of it (a "descriptor") into a queue. The switch then processes these descriptors in order, telling the core when and where to move each packet. However, if a packet meets a specific "predefined criterion" (e.g., high priority), the switch bypasses the queue. It sends an immediate request to the switching core to start transferring that packet right away. A separate signal is sent to the descriptor queue, and if that descriptor reaches the front of the queue later, it's marked as "dropped" to prevent the packet from being sent twice.
2. The device according to claim 1 , wherein the data packet is transferred to the egress port by instruction of the switching logic responsively to determining that the corresponding descriptor advances to a head of the descriptor queue.
In the network switch described previously, data packets are typically transferred to their destination port only after their corresponding descriptor reaches the front of the queue and is processed by the switching logic. This represents the standard, queue-based forwarding mechanism for most packets.
3. The device according to claim 1 , and comprising a packet buffer, in which the ports queue the data packets for transfer by the switching core, and wherein the switching core comprises: a first input buffer coupled to receive the data packets from the packet buffer to be transferred in response to the queued descriptors; a second input buffer coupled to receive the data packets from the packet buffer to be transferred in response to requests to begin to transfer the data packet immediately; and a switch coupled to arbitrate between the first and second input buffers.
The network switch described earlier also includes a packet buffer where incoming data packets are temporarily stored. The switching core utilizes two input buffers: one that receives packets based on the order of descriptors in the queue, and another that receives packets marked for immediate transfer. A switch component then arbitrates between these two buffers, deciding which packets to send based on priority or other configured rules. Packets are retrieved from the packet buffer into one of the switching core input buffers for transfer.
4. The device according to claim 3 , wherein the switching logic is coupled to receive an indication of a fill status of the second input buffer and to grant the request to begin to transfer the data packet immediately in response to emptying of the second input buffer.
In the network switch with two input buffers described previously, the switching logic monitors how full the "immediate transfer" buffer is. It only grants requests for immediate transfer if that buffer is empty, preventing it from being overwhelmed and ensuring fair access to the switching core. This avoids congestion and maintains performance for both normal and expedited traffic.
5. The device according to claim 3 , wherein the packet buffer is centralized within the device.
In the network switch with two input buffers, the packet buffer (where data packets are initially stored) is centralized. This means there is one shared buffer for all the ports, offering efficient memory utilization and potentially simplifying buffer management.
6. The device according to claim 3 , wherein the packet buffer is distributed among the ports.
In the network switch with two input buffers, the packet buffer (where data packets are initially stored) is distributed among the ports. Each port has its own dedicated buffer space, potentially reducing contention and improving performance for high-bandwidth ports.
7. The device according to claim 1 , wherein the ports comprise a forwarding cache, which contains entries indicating respective egress ports for incoming data packets having header fields containing certain predefined values, and wherein the port logic is configured to identify the data packet for immediate transfer to the egress port responsively to finding for the data packet a corresponding entry in the forwarding cache.
In the network switch described earlier, each port has a "forwarding cache." This cache stores information about where to send certain types of packets based on their headers. If an incoming packet matches an entry in the cache, the port logic immediately identifies it for expedited transfer, bypassing the normal queue. The forwarding cache allows for rapid routing of frequently used packet types.
8. The device according to claim 7 , wherein the port logic is configured, upon receiving incoming data packets that are not identified by the entries in the forwarding cache for immediate transfer to respective egress ports, to signal the switching logic to queue corresponding descriptors without requesting to begin to transfer the data packet immediately.
In the network switch with a forwarding cache, if an incoming packet doesn't match any entries in the forwarding cache (meaning it's not identified for immediate transfer), the port logic signals the switching logic to queue a descriptor for that packet without requesting immediate transfer. This ensures that packets not found in the cache are handled through the normal queuing process.
9. The device according to claim 1 , wherein the switching logic is configured to instruct the switching core to transfer the data packets to respective egress ports according to credits issued by the egress ports, while dividing the credits for each egress port in accordance with a predefined distribution between first transfers of the data packets referred to by descriptors read from the queued descriptors and second transfers of the data packets in response to requests to begin to transfer the data packet immediately.
In the network switch described earlier, the switching logic manages data transfer based on "credits" issued by the destination ports. These credits indicate the capacity of each port to receive data. The switch allocates these credits differently: some are for regular, queue-based transfers, and some are for the expedited, immediate transfers. This ensures fair bandwidth allocation between the two transfer mechanisms. The credits allocated to each mechanism are based on a predefined distribution ratio.
10. The device according to claim 1 , wherein the switching logic is configured to drop the corresponding descriptor from the descriptor queue upon granting the request to transfer the data packet immediately to an egress port.
In the network switch described earlier, when the switching logic grants a request to immediately transfer a packet, it also removes the corresponding descriptor from the descriptor queue. This prevents the packet from being processed a second time when the descriptor eventually reaches the head of the queue. This ensures that the packet is only transferred once via the express pathway.
11. A method for communication, comprising: coupling a switch, comprising a plurality of ports, which are configured to serve as ingress and egress ports, and a switching core, which is coupled to transfer data packets between the ingress and egress ports, to receive and transmit data packets from and to a network; upon receiving a data packet from the network at a given ingress port, placing a corresponding descriptor in a descriptor queue, containing respective descriptors corresponding to data packets that have been received and queued by the ports; reading the descriptors from the descriptor queue, using switching logic in the switch, and instructing the switching core to transfer the queued data packets referred to by the read descriptors, between the ports; determining at the given ingress port, whether the data packet meets a predefined criterion; upon identifying the received data packet at the given ingress port as meeting the predefined criterion, conveying a request to the switching logic, to instruct the switching core to begin to transfer the data packet immediately to an egress port, before the descriptor corresponding to the data packet is read and processed by the switching logic, wherein the conveying of the request to the switching logic is a separate act from placing the descriptor corresponding to the data packet in the descriptor queue; and upon grant of the request by the switching logic, transferring the data packet to the egress port and signaling the corresponding descriptor from the descriptor queue as intended to be dropped, so that responsively to determining that the corresponding descriptor reaches a head of the descriptor queue the packet will not be transferred a second time.
A method for speeding up data communication through a network switch is described. The switch has ports for sending and receiving data. When a packet arrives, a description ("descriptor") is placed in a queue. Normally, the switch reads these descriptors in order and transfers the packets accordingly. However, if a packet meets a specific criterion, an immediate transfer request is sent to the switching logic, bypassing the queue. The descriptor is also placed in the queue. If the request is granted, the packet is transferred immediately, and when the descriptor eventually rises to the head of the queue it is marked as dropped so the packet will not be resent.
12. The method according to claim 11 , and comprising, upon refusal of the request, transferring the data packet to the egress port by instruction of the switching logic responsively to determining that the corresponding descriptor advances to a head of the descriptor queue.
Building on the previous communication method, if an immediate transfer request is denied, the packet is transferred according to the normal queue-based procedure. The packet is transferred to the destination port by the instruction of switching logic only after the descriptor has advanced to the head of the queue.
13. The method according to claim 11 , wherein transferring the data packet comprises arbitrating between a first input buffer coupled to receive the data packets to be transferred in response to the queued descriptors and a second input buffer coupled to receive the data packets to be transferred in response to requests to transfer the data packet immediately to an egress port.
Building on the communication method, the transfer process includes choosing between two input buffers: one for queue-based transfers and one for immediate transfers. The selection of input buffer constitutes an arbitration process for the transfer.
14. The method according to claim 13 , wherein transferring the data packet comprises granting the request to transfer the data packet immediately to an egress port only in response to emptying of the second input buffer.
Building on the previous communication method, the immediate transfer request is granted only if the "immediate transfer" buffer is empty. This prevents the immediate transfer pathway from becoming overloaded and starving the standard queue.
15. The method according to claim 11 , wherein identifying the received data packet comprises comparing header field values from the received data packet to entries in a forwarding cache indicating respective egress ports for incoming data packets having header fields containing certain predefined values, and identifying the data packet for immediate transfer to the egress port responsively to finding a corresponding entry in the forwarding cache.
Building on the communication method, the determination of immediate transfer uses a forwarding cache. Incoming packet headers are compared to entries in the cache. The cache maps header values to destination ports. If a match is found, the packet is immediately designated for transfer without waiting in the queue.
16. The method according to claim 15 , wherein placing the corresponding descriptor comprises, upon receiving incoming data packets that are not identified by the entries in the forwarding cache for immediate transfer to respective egress ports, signaling the switching logic to queue corresponding descriptors without requesting to transfer the data packet immediately to an egress port.
Building on the previous communication method that utilizes a forwarding cache, packets that do not match the entries in the forwarding cache are queued for regular transfer without the immediate transfer request being sent. The switch logic queues these descriptors and transfers these packets through the standard process.
17. The method according to claim 11 , wherein transferring the data packet comprises instructing the switching core to transfer the data packets to respective egress ports responsively to credits issued by the egress ports, while dividing the credits for each egress port in accordance with a predefined distribution between first transfers of the data packets referred to by descriptors read from the queued descriptors and second transfers of the data packets in response to requests to transfer the data packet immediately to an egress port.
Building on the communication method, the transfer process adheres to credit constraints issued by the destination egress ports to prevent overflow. Credits are assigned to the switch core and are divided between standard transfers and immediate transfers. A pre-defined ratio is maintained between the standard transfers and the immediate transfer to ensure quality of service.
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August 22, 2013
May 2, 2017
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