A complementary thin film transistor driving back plate and a preparing method thereof, and a display device are disclosed. The preparing method comprises: forming a lower electrode (102) on a base substrate (101); sequentially disposing a continuously grown dielectric layer (103), a semiconductor layer (104), and a diffusion protection layer (105); sequentially forming a no-photoresist region (107), an N-type thin film transistor preparation region (108), and a P-type thin film transistor preparation region (109); removing a photoresist layer (114) of the N-type thin film transistor preparation region (108); removing a diffusion protection layer (105) of the N-type thin film transistor preparation region (105); removing a photoresist layer (114) of the P-type thin film transistor preparation region (109); performing an oxidation treatment to the base substrate (101); disposing a passivation layer (111) on the base substrate (101); and forming an upper electrode (113) on the passivation layer (111).
Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.
1. A preparing method of a complementary thin film transistor driving back plate, comprising: forming a lower electrode on a base substrate; sequentially disposing a continuously grown dielectric layer, a semiconductor layer, and a diffusion protection layer; forming a no-photoresist region, an N-type thin film transistor preparation region, and a P-type thin film transistor preparation region; removing a photoresist layer of the N-type thin film transistor preparation region while remaining a photoresist layer of the P-type thin film transistor preparation region; removing the diffusion protection layer of the N-type thin film transistor preparation region while remaining the diffusion protection layer of the P-type thin film transistor preparation region; removing the photoresist layer in the P-type thin film transistor preparation region, and forming a P-type thin film transistor with a P-type active layer; performing an oxidation treatment to the base substrate, and forming an N-type thin film transistor with an N-type active layer; disposing a passivation layer on the base substrate; and forming an upper electrode on the passivation layer.
A method for manufacturing a complementary thin-film transistor (TFT) backplate involves these steps: First, a bottom electrode is formed on a substrate. Next, a dielectric layer, a semiconductor layer, and a diffusion protection layer are sequentially deposited. Then, regions are defined for N-type TFTs, P-type TFTs, and a region without photoresist. The photoresist and diffusion protection layer are removed from the N-type region, while leaving both on the P-type region. The photoresist is then removed from the P-type region to form the P-type TFT with a P-type active layer. An oxidation process is performed to create the N-type active layer, forming the N-type TFT. Finally, a passivation layer is deposited, followed by the formation of a top electrode.
2. The preparing method of a complementary thin film transistor driving back plate according to claim 1 , further comprising: performing an annealing treatment to the prepared complementary thin film transistor driving back plate.
The method for manufacturing a complementary thin-film transistor (TFT) backplate, which includes forming a lower electrode on a base substrate; sequentially disposing a continuously grown dielectric layer, a semiconductor layer, and a diffusion protection layer; forming a no-photoresist region, an N-type thin film transistor preparation region, and a P-type thin film transistor preparation region; removing a photoresist layer of the N-type thin film transistor preparation region while remaining a photoresist layer of the P-type thin film transistor preparation region; removing the diffusion protection layer of the N-type thin film transistor preparation region while remaining the diffusion protection layer of the P-type thin film transistor preparation region; removing the photoresist layer in the P-type thin film transistor preparation region, and forming a P-type thin film transistor with a P-type active layer; performing an oxidation treatment to the base substrate, and forming an N-type thin film transistor with an N-type active layer; disposing a passivation layer on the base substrate; and forming an upper electrode on the passivation layer, also includes an annealing step performed on the finished backplate.
3. The preparing method of a complementary thin film transistor driving back plate according to claim 2 , wherein an annealing temperature is within a range of 120˜450° C., and an annealing time period is within a range of 0.5˜2.0 h.
The method for manufacturing a complementary thin-film transistor (TFT) backplate, which includes forming a lower electrode on a base substrate; sequentially disposing a continuously grown dielectric layer, a semiconductor layer, and a diffusion protection layer; forming a no-photoresist region, an N-type thin film transistor preparation region, and a P-type thin film transistor preparation region; removing a photoresist layer of the N-type thin film transistor preparation region while remaining a photoresist layer of the P-type thin film transistor preparation region; removing the diffusion protection layer of the N-type thin film transistor preparation region while remaining the diffusion protection layer of the P-type thin film transistor preparation region; removing the photoresist layer in the P-type thin film transistor preparation region, and forming a P-type thin film transistor with a P-type active layer; performing an oxidation treatment to the base substrate, and forming an N-type thin film transistor with an N-type active layer; disposing a passivation layer on the base substrate; and forming an upper electrode on the passivation layer, also includes an annealing step performed on the finished backplate. The annealing is performed at a temperature between 120 and 450 degrees Celsius, for a duration of 0.5 to 2.0 hours.
4. The preparing method of a complementary thin film transistor driving back plate according to claim 3 , wherein a material of the semiconductor layer is SnO material.
The method for manufacturing a complementary thin-film transistor (TFT) backplate, which includes forming a lower electrode on a base substrate; sequentially disposing a continuously grown dielectric layer, a semiconductor layer, and a diffusion protection layer; forming a no-photoresist region, an N-type thin film transistor preparation region, and a P-type thin film transistor preparation region; removing a photoresist layer of the N-type thin film transistor preparation region while remaining a photoresist layer of the P-type thin film transistor preparation region; removing the diffusion protection layer of the N-type thin film transistor preparation region while remaining the diffusion protection layer of the P-type thin film transistor preparation region; removing the photoresist layer in the P-type thin film transistor preparation region, and forming a P-type thin film transistor with a P-type active layer; performing an oxidation treatment to the base substrate, and forming an N-type thin film transistor with an N-type active layer; disposing a passivation layer on the base substrate; and forming an upper electrode on the passivation layer, also includes an annealing step performed on the finished backplate. The annealing is performed at a temperature between 120 and 450 degrees Celsius, for a duration of 0.5 to 2.0 hours. The semiconductor layer is made of SnO (tin monoxide).
5. The preparing method of a complementary thin film transistor driving back plate according to claim 4 , wherein the semiconductor layer in the N-type thin film transistor preparation region after the oxidation treatment, a material of which is oxidized from SnO to SnO x , where 1<x<2, is used as the N-type active layer of the N-type thin film transistor; and during the process of the oxidation treatment, the P-type active layer of the P-type thin film transistor is not subjected to the oxidation treatment because of protection of the diffusion protection layer.
The method for manufacturing a complementary thin-film transistor (TFT) backplate, which includes forming a lower electrode on a base substrate; sequentially disposing a continuously grown dielectric layer, a semiconductor layer (SnO), and a diffusion protection layer; forming a no-photoresist region, an N-type thin film transistor preparation region, and a P-type thin film transistor preparation region; removing a photoresist layer of the N-type thin film transistor preparation region while remaining a photoresist layer of the P-type thin film transistor preparation region; removing the diffusion protection layer of the N-type thin film transistor preparation region while remaining the diffusion protection layer of the P-type thin film transistor preparation region; removing the photoresist layer in the P-type thin film transistor preparation region, and forming a P-type thin film transistor with a P-type active layer; performing an oxidation treatment to the base substrate, and forming an N-type thin film transistor with an N-type active layer; disposing a passivation layer on the base substrate; and forming an upper electrode on the passivation layer, also includes an annealing step performed on the finished backplate. The annealing is performed at a temperature between 120 and 450 degrees Celsius, for a duration of 0.5 to 2.0 hours. The semiconductor layer is made of SnO (tin monoxide). The N-type active layer is formed by oxidizing the SnO in the N-type region to SnOx, where 1 < x < 2, during the oxidation step. The diffusion protection layer prevents the P-type active layer from being oxidized during this oxidation step.
6. The preparing method of a complementary thin film transistor driving back plate according to claim 3 , wherein the semiconductor layer is formed by using one of sputtering process, sol-gel process, vacuum evaporation process, and spraying process.
The method for manufacturing a complementary thin-film transistor (TFT) backplate, which includes forming a lower electrode on a base substrate; sequentially disposing a continuously grown dielectric layer, a semiconductor layer, and a diffusion protection layer; forming a no-photoresist region, an N-type thin film transistor preparation region, and a P-type thin film transistor preparation region; removing a photoresist layer of the N-type thin film transistor preparation region while remaining a photoresist layer of the P-type thin film transistor preparation region; removing the diffusion protection layer of the N-type thin film transistor preparation region while remaining the diffusion protection layer of the P-type thin film transistor preparation region; removing the photoresist layer in the P-type thin film transistor preparation region, and forming a P-type thin film transistor with a P-type active layer; performing an oxidation treatment to the base substrate, and forming an N-type thin film transistor with an N-type active layer; disposing a passivation layer on the base substrate; and forming an upper electrode on the passivation layer, also includes an annealing step performed on the finished backplate. The annealing is performed at a temperature between 120 and 450 degrees Celsius, for a duration of 0.5 to 2.0 hours. The semiconductor layer is deposited using sputtering, sol-gel, vacuum evaporation, or spraying.
7. The preparing method of a complementary thin film transistor driving back plate according to claim 3 , wherein performing a patterning treatment to an upper electrode layer to form a plurality of upper electrodes.
The method for manufacturing a complementary thin-film transistor (TFT) backplate, which includes forming a lower electrode on a base substrate; sequentially disposing a continuously grown dielectric layer, a semiconductor layer, and a diffusion protection layer; forming a no-photoresist region, an N-type thin film transistor preparation region, and a P-type thin film transistor preparation region; removing a photoresist layer of the N-type thin film transistor preparation region while remaining a photoresist layer of the P-type thin film transistor preparation region; removing the diffusion protection layer of the N-type thin film transistor preparation region while remaining the diffusion protection layer of the P-type thin film transistor preparation region; removing the photoresist layer in the P-type thin film transistor preparation region, and forming a P-type thin film transistor with a P-type active layer; performing an oxidation treatment to the base substrate, and forming an N-type thin film transistor with an N-type active layer; disposing a passivation layer on the base substrate; and forming an upper electrode on the passivation layer, also includes an annealing step performed on the finished backplate. The annealing is performed at a temperature between 120 and 450 degrees Celsius, for a duration of 0.5 to 2.0 hours. The upper electrode layer is patterned to create multiple upper electrodes.
8. The preparing method of a complementary thin film transistor driving back plate according to claim 2 , wherein a material of the semiconductor layer is SnO material.
The method for manufacturing a complementary thin-film transistor (TFT) backplate, which includes forming a lower electrode on a base substrate; sequentially disposing a continuously grown dielectric layer, a semiconductor layer, and a diffusion protection layer; forming a no-photoresist region, an N-type thin film transistor preparation region, and a P-type thin film transistor preparation region; removing a photoresist layer of the N-type thin film transistor preparation region while remaining a photoresist layer of the P-type thin film transistor preparation region; removing the diffusion protection layer of the N-type thin film transistor preparation region while remaining the diffusion protection layer of the P-type thin film transistor preparation region; removing the photoresist layer in the P-type thin film transistor preparation region, and forming a P-type thin film transistor with a P-type active layer; performing an oxidation treatment to the base substrate, and forming an N-type thin film transistor with an N-type active layer; disposing a passivation layer on the base substrate; and forming an upper electrode on the passivation layer, also includes an annealing step performed on the finished backplate. The semiconductor layer is made of SnO (tin monoxide).
9. The preparing method of a complementary thin film transistor driving back plate according to claim 8 , wherein the semiconductor layer in the N-type thin film transistor preparation region after the oxidation treatment, a material of which is oxidized from SnO to SnO x , where 1<x<2, is used as the N-type active layer of the N-type thin film transistor; and during the process of the oxidation treatment, the P-type active layer of the P-type thin film transistor is not subjected to the oxidation treatment because of protection of the diffusion protection layer.
The method for manufacturing a complementary thin-film transistor (TFT) backplate, which includes forming a lower electrode on a base substrate; sequentially disposing a continuously grown dielectric layer, a semiconductor layer (SnO), and a diffusion protection layer; forming a no-photoresist region, an N-type thin film transistor preparation region, and a P-type thin film transistor preparation region; removing a photoresist layer of the N-type thin film transistor preparation region while remaining a photoresist layer of the P-type thin film transistor preparation region; removing the diffusion protection layer of the N-type thin film transistor preparation region while remaining the diffusion protection layer of the P-type thin film transistor preparation region; removing the photoresist layer in the P-type thin film transistor preparation region, and forming a P-type thin film transistor with a P-type active layer; performing an oxidation treatment to the base substrate, and forming an N-type thin film transistor with an N-type active layer; disposing a passivation layer on the base substrate; and forming an upper electrode on the passivation layer, also includes an annealing step performed on the finished backplate. The semiconductor layer is made of SnO (tin monoxide). The N-type active layer is formed by oxidizing the SnO in the N-type region to SnOx, where 1 < x < 2, during the oxidation step. The diffusion protection layer prevents the P-type active layer from being oxidized during this oxidation step.
10. The preparing method of a complementary thin film transistor driving back plate according to claim 2 , wherein the semiconductor layer is formed by using one of sputtering process, sol-gel process, vacuum evaporation process, and spraying process.
The method for manufacturing a complementary thin-film transistor (TFT) backplate, which includes forming a lower electrode on a base substrate; sequentially disposing a continuously grown dielectric layer, a semiconductor layer, and a diffusion protection layer; forming a no-photoresist region, an N-type thin film transistor preparation region, and a P-type thin film transistor preparation region; removing a photoresist layer of the N-type thin film transistor preparation region while remaining a photoresist layer of the P-type thin film transistor preparation region; removing the diffusion protection layer of the N-type thin film transistor preparation region while remaining the diffusion protection layer of the P-type thin film transistor preparation region; removing the photoresist layer in the P-type thin film transistor preparation region, and forming a P-type thin film transistor with a P-type active layer; performing an oxidation treatment to the base substrate, and forming an N-type thin film transistor with an N-type active layer; disposing a passivation layer on the base substrate; and forming an upper electrode on the passivation layer, also includes an annealing step performed on the finished backplate. The semiconductor layer is deposited using sputtering, sol-gel, vacuum evaporation, or spraying.
11. The preparing method of a complementary thin film transistor driving back plate according to claim 2 , wherein performing a patterning treatment to an upper electrode layer to form a plurality of upper electrodes.
The method for manufacturing a complementary thin-film transistor (TFT) backplate, which includes forming a lower electrode on a base substrate; sequentially disposing a continuously grown dielectric layer, a semiconductor layer, and a diffusion protection layer; forming a no-photoresist region, an N-type thin film transistor preparation region, and a P-type thin film transistor preparation region; removing a photoresist layer of the N-type thin film transistor preparation region while remaining a photoresist layer of the P-type thin film transistor preparation region; removing the diffusion protection layer of the N-type thin film transistor preparation region while remaining the diffusion protection layer of the P-type thin film transistor preparation region; removing the photoresist layer in the P-type thin film transistor preparation region, and forming a P-type thin film transistor with a P-type active layer; performing an oxidation treatment to the base substrate, and forming an N-type thin film transistor with an N-type active layer; disposing a passivation layer on the base substrate; and forming an upper electrode on the passivation layer, also includes an annealing step performed on the finished backplate. The upper electrode layer is patterned to create multiple upper electrodes.
12. The preparing method of a complementary thin film transistor driving back plate according to claim 1 , wherein a material of the semiconductor layer is SnO material.
The method for manufacturing a complementary thin-film transistor (TFT) backplate, which includes forming a lower electrode on a base substrate; sequentially disposing a continuously grown dielectric layer, a semiconductor layer, and a diffusion protection layer; forming a no-photoresist region, an N-type thin film transistor preparation region, and a P-type thin film transistor preparation region; removing a photoresist layer of the N-type thin film transistor preparation region while remaining a photoresist layer of the P-type thin film transistor preparation region; removing the diffusion protection layer of the N-type thin film transistor preparation region while remaining the diffusion protection layer of the P-type thin film transistor preparation region; removing the photoresist layer in the P-type thin film transistor preparation region, and forming a P-type thin film transistor with a P-type active layer; performing an oxidation treatment to the base substrate, and forming an N-type thin film transistor with an N-type active layer; disposing a passivation layer on the base substrate; and forming an upper electrode on the passivation layer. The semiconductor layer is made of SnO (tin monoxide).
13. The preparing method of a complementary thin film transistor driving back plate according to claim 12 , wherein the semiconductor layer in the N-type thin film transistor preparation region after the oxidation treatment, a material of which is oxidized from SnO to SnO x , where 1<x<2, is used as the N-type active layer of the N-type thin film transistor; and during the process of the oxidation treatment, the P-type active layer of the P-type thin film transistor is not subjected to the oxidation treatment because of protection of the diffusion protection layer.
The method for manufacturing a complementary thin-film transistor (TFT) backplate, which includes forming a lower electrode on a base substrate; sequentially disposing a continuously grown dielectric layer, a semiconductor layer (SnO), and a diffusion protection layer; forming a no-photoresist region, an N-type thin film transistor preparation region, and a P-type thin film transistor preparation region; removing a photoresist layer of the N-type thin film transistor preparation region while remaining a photoresist layer of the P-type thin film transistor preparation region; removing the diffusion protection layer of the N-type thin film transistor preparation region while remaining the diffusion protection layer of the P-type thin film transistor preparation region; removing the photoresist layer in the P-type thin film transistor preparation region, and forming a P-type thin film transistor with a P-type active layer; performing an oxidation treatment to the base substrate, and forming an N-type thin film transistor with an N-type active layer; disposing a passivation layer on the base substrate; and forming an upper electrode on the passivation layer. The semiconductor layer is made of SnO (tin monoxide). The N-type active layer is formed by oxidizing the SnO in the N-type region to SnOx, where 1 < x < 2, during the oxidation step. The diffusion protection layer prevents the P-type active layer from being oxidized during this oxidation step.
14. The preparing method of a complementary thin film transistor driving back plate according to claim 12 , wherein the semiconductor layer is formed by using one of sputtering process, sol-gel process, vacuum evaporation process, and spraying process.
The method for manufacturing a complementary thin-film transistor (TFT) backplate, which includes forming a lower electrode on a base substrate; sequentially disposing a continuously grown dielectric layer, a semiconductor layer, and a diffusion protection layer; forming a no-photoresist region, an N-type thin film transistor preparation region, and a P-type thin film transistor preparation region; removing a photoresist layer of the N-type thin film transistor preparation region while remaining a photoresist layer of the P-type thin film transistor preparation region; removing the diffusion protection layer of the N-type thin film transistor preparation region while remaining the diffusion protection layer of the P-type thin film transistor preparation region; removing the photoresist layer in the P-type thin film transistor preparation region, and forming a P-type thin film transistor with a P-type active layer; performing an oxidation treatment to the base substrate, and forming an N-type thin film transistor with an N-type active layer; disposing a passivation layer on the base substrate; and forming an upper electrode on the passivation layer. The semiconductor layer is deposited using sputtering, sol-gel, vacuum evaporation, or spraying.
15. The preparing method of a complementary thin film transistor driving back plate according to claim 12 , wherein performing a patterning treatment to an upper electrode layer to form a plurality of upper electrodes.
The method for manufacturing a complementary thin-film transistor (TFT) backplate, which includes forming a lower electrode on a base substrate; sequentially disposing a continuously grown dielectric layer, a semiconductor layer, and a diffusion protection layer; forming a no-photoresist region, an N-type thin film transistor preparation region, and a P-type thin film transistor preparation region; removing a photoresist layer of the N-type thin film transistor preparation region while remaining a photoresist layer of the P-type thin film transistor preparation region; removing the diffusion protection layer of the N-type thin film transistor preparation region while remaining the diffusion protection layer of the P-type thin film transistor preparation region; removing the photoresist layer in the P-type thin film transistor preparation region, and forming a P-type thin film transistor with a P-type active layer; performing an oxidation treatment to the base substrate, and forming an N-type thin film transistor with an N-type active layer; disposing a passivation layer on the base substrate; and forming an upper electrode on the passivation layer. The upper electrode layer is patterned to create multiple upper electrodes.
16. The preparing method of a complementary thin film transistor driving back plate according to claim 1 , wherein the semiconductor layer is formed by using one of sputtering process, sol-gel process, vacuum evaporation process, and spraying process.
The method for manufacturing a complementary thin-film transistor (TFT) backplate, which includes forming a lower electrode on a base substrate; sequentially disposing a continuously grown dielectric layer, a semiconductor layer, and a diffusion protection layer; forming a no-photoresist region, an N-type thin film transistor preparation region, and a P-type thin film transistor preparation region; removing a photoresist layer of the N-type thin film transistor preparation region while remaining a photoresist layer of the P-type thin film transistor preparation region; removing the diffusion protection layer of the N-type thin film transistor preparation region while remaining the diffusion protection layer of the P-type thin film transistor preparation region; removing the photoresist layer in the P-type thin film transistor preparation region, and forming a P-type thin film transistor with a P-type active layer; performing an oxidation treatment to the base substrate, and forming an N-type thin film transistor with an N-type active layer; disposing a passivation layer on the base substrate; and forming an upper electrode on the passivation layer. The semiconductor layer is deposited using sputtering, sol-gel, vacuum evaporation, or spraying.
17. The preparing method of a complementary thin film transistor driving back plate according to claim 16 , wherein performing a patterning treatment to an upper electrode layer to form a plurality of upper electrodes.
The method for manufacturing a complementary thin-film transistor (TFT) backplate, which includes forming a lower electrode on a base substrate; sequentially disposing a continuously grown dielectric layer, a semiconductor layer, and a diffusion protection layer; forming a no-photoresist region, an N-type thin film transistor preparation region, and a P-type thin film transistor preparation region; removing a photoresist layer of the N-type thin film transistor preparation region while remaining a photoresist layer of the P-type thin film transistor preparation region; removing the diffusion protection layer of the N-type thin film transistor preparation region while remaining the diffusion protection layer of the P-type thin film transistor preparation region; removing the photoresist layer in the P-type thin film transistor preparation region, and forming a P-type thin film transistor with a P-type active layer; performing an oxidation treatment to the base substrate, and forming an N-type thin film transistor with an N-type active layer; disposing a passivation layer on the base substrate; and forming an upper electrode on the passivation layer. The semiconductor layer is deposited using sputtering, sol-gel, vacuum evaporation, or spraying. The upper electrode layer is patterned to create multiple upper electrodes.
18. The preparing method of a complementary thin film transistor driving back plate according to claim 1 , wherein performing a patterning treatment to an upper electrode layer to form a plurality of upper electrodes.
The method for manufacturing a complementary thin-film transistor (TFT) backplate, which includes forming a lower electrode on a base substrate; sequentially disposing a continuously grown dielectric layer, a semiconductor layer, and a diffusion protection layer; forming a no-photoresist region, an N-type thin film transistor preparation region, and a P-type thin film transistor preparation region; removing a photoresist layer of the N-type thin film transistor preparation region while remaining a photoresist layer of the P-type thin film transistor preparation region; removing the diffusion protection layer of the N-type thin film transistor preparation region while remaining the diffusion protection layer of the P-type thin film transistor preparation region; removing the photoresist layer in the P-type thin film transistor preparation region, and forming a P-type thin film transistor with a P-type active layer; performing an oxidation treatment to the base substrate, and forming an N-type thin film transistor with an N-type active layer; disposing a passivation layer on the base substrate; and forming an upper electrode on the passivation layer. The upper electrode layer is patterned to create multiple upper electrodes.
19. A complementary thin film transistor driving back plate, comprising: a base substrate; a plurality of P-type thin film transistor preparation regions and a plurality of N-type thin film transistor preparation regions disposed on the base substrate, and a no-photoresist region disposed between the P-type thin film transistor preparation region and the N-type thin film transistor preparation region; wherein each of the P-type thin film transistor preparation regions is sequentially provided with a first lower electrode, a continuously grown dielectric layer, a P-type active layer, a diffusion protection layer, and a passivation layer from bottom to top; two sides of the P-type active layer are each provided with a first upper electrode contacted with the P-type active layer, the first upper electrode extends through a first contact hole in the passivation layer, and a first electrode connecting head is disposed on the first upper electrode; and the P-type active layer and the first lower electrode constitute a P-type thin film transistor; and each of the N-type thin film transistor preparation regions is sequentially provided with a second lower electrode, the continuously grown dielectric layer, an N-type active layer, and the passivation layer from bottom to top; two sides of the N-type active layer are each provided with a second upper electrode contacted with the N-type active layer, the second upper electrode extends through a second contact hole in the passivation layer, the passivation layer directly contacts an upper surface of the N-type active layer, and a second electrode connecting head is disposed on the second upper electrode; and the N-type active layer and the second lower electrode constitute an N-type thin film transistor.
A complementary thin-film transistor (TFT) backplate consists of a base substrate with alternating regions for P-type and N-type TFTs, separated by a region without photoresist. Each P-type TFT region includes a bottom electrode, a dielectric layer, a P-type active layer, a diffusion protection layer, and a passivation layer. Top electrodes connect to the P-type active layer through contact holes in the passivation layer, and these electrodes have connecting heads. The P-type active layer and bottom electrode form the P-type TFT. Each N-type TFT region includes a bottom electrode, a dielectric layer, an N-type active layer, and a passivation layer. Top electrodes connect to the N-type active layer through contact holes, with the passivation layer directly contacting the N-type active layer, and have connecting heads. The N-type active layer and bottom electrode form the N-type TFT.
20. A display device, which comprises the complementary thin film transistor driving back plate according to claim 19 .
A display device incorporates a complementary thin-film transistor (TFT) backplate consisting of a base substrate with alternating regions for P-type and N-type TFTs, separated by a region without photoresist. Each P-type TFT region includes a bottom electrode, a dielectric layer, a P-type active layer, a diffusion protection layer, and a passivation layer. Top electrodes connect to the P-type active layer through contact holes in the passivation layer, and these electrodes have connecting heads. The P-type active layer and bottom electrode form the P-type TFT. Each N-type TFT region includes a bottom electrode, a dielectric layer, an N-type active layer, and a passivation layer. Top electrodes connect to the N-type active layer through contact holes, with the passivation layer directly contacting the N-type active layer, and have connecting heads. The N-type active layer and bottom electrode form the N-type TFT.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
May 27, 2014
May 9, 2017
Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.