An integrated circuit includes a bottom substrate, a metal layer disposed over the bottom substrate and a hollow metal pillar disposed on the metal layer. The metal layer and the hollow metal pillar are electrically connected.
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1. A method, comprising: forming a metal layer over a bottom substrate; forming a hollow metal pillar on the metal layer, wherein the metal layer and the hollow metal pillar are electrically connected; and forming a stress buffer layer on the metal layer after forming the hollow metal pillar, wherein the stress buffer layer fills inside the hollow metal pillar and surrounds the hollow metal pillar.
A method for packaging integrated circuits involves creating a metal layer on a bottom substrate. A hollow metal pillar is then formed on top of this metal layer, ensuring electrical connection between them. After forming the pillar, a stress buffer layer is applied. This layer fills the inside of the hollow pillar and also surrounds it, providing mechanical support and stress relief.
2. The method of claim 1 , further comprising: pressuring the stress buffer layer with a release film; and curing the stress buffer layer.
The method for packaging integrated circuits, as described previously, further includes pressing a release film against the stress buffer layer, followed by curing the stress buffer layer. This compression during curing helps to ensure proper density and adhesion of the stress buffer material within and around the hollow metal pillar.
3. The method of claim 1 , further comprising forming a passivation layer between the bottom substrate and the metal layer.
The method for packaging integrated circuits, as described previously, also includes forming a passivation layer between the bottom substrate and the metal layer. This passivation layer improves electrical isolation and prevents unwanted interactions between the substrate and the metal layer, enhancing device reliability.
4. The method of claim 1 , further comprising forming a solder layer on the hollow metal pillar.
The method for packaging integrated circuits, as described previously, further includes forming a solder layer on top of the hollow metal pillar. This solder layer serves as a bonding interface for attaching another component or package to the integrated circuit.
5. The method of claim 4 , further comprising mounting a top package over the solder layer.
The method for packaging integrated circuits, which involves forming a solder layer on the hollow metal pillar, further includes mounting a top package over this solder layer. This top package is physically attached to the integrated circuit using the solder connection on the hollow metal pillar.
6. The method of claim 5 , further comprising reflowing the solder layer to electrically connect the top package and the hollow metal pillar.
The method for packaging integrated circuits, where a top package is mounted over the solder layer on the hollow metal pillar, includes reflowing the solder layer to create an electrical connection between the top package and the hollow metal pillar. This reflow process melts the solder, establishing a reliable electrical pathway.
7. The method of claim 1 , wherein the hollow metal pillar comprises copper.
In the method for packaging integrated circuits involving a hollow metal pillar, the hollow metal pillar is made of copper. Using copper as the material for the pillar provides good electrical conductivity and thermal management.
8. The method of claim 1 , further comprising forming a contact pad between the metal layer and the bottom substrate wherein the contact pad and the metal layer are electrically connected.
The method for packaging integrated circuits, as described previously, includes forming a contact pad between the metal layer and the bottom substrate, ensuring electrical connection between this contact pad and the metal layer. This contact pad allows for external electrical connections to be made to the integrated circuit.
9. A method, comprising: forming a patterning layer over a package structure having a conductor thereon, the patterning layer having an annular pattern exposing a portion of the conductor; depositing a first conductive material within the annular pattern; depositing a second conductive material within the annular pattern and on the first conductive material, the second conductive material being different from the first conductive material; and removing the patterning layer.
A method involves creating a patterning layer over a package structure that has a conductor. This patterning layer contains an annular pattern that exposes a section of the conductor. A first conductive material is deposited within this annular pattern, followed by depositing a second conductive material within the same annular pattern and on top of the first material, with the second material being different from the first. Finally, the patterning layer is removed, leaving behind the two conductive materials forming a structure.
10. The method of claim 9 , wherein an annular metal pillar remains after the step of removing the patterning layer and further comprising: filling a region within the annular metal pillar with a stress buffer layer.
The method involving the formation of an annular pattern and deposition of conductive materials results in an annular metal pillar. After removing the patterning layer, the method includes filling the region inside the annular metal pillar with a stress buffer layer to provide mechanical support and stress relief.
11. The method of claim 10 , wherein the step of filling a region within the annular metal pillar with a stress buffer layer includes: encapsulating the annular metal pillar in a stress buffer material; and removing some of the stress buffer material so that a topmost surface of the stress buffer material is below a topmost surface of the annular metal pillar.
The method of filling the inside of an annular metal pillar with a stress buffer layer includes first encapsulating the entire annular metal pillar in a stress buffer material. Then, some of the stress buffer material is removed, so that the top surface of the stress buffer material is lower than the top surface of the annular metal pillar, creating a recess.
12. The method of claim 11 , wherein the step of encapsulating the annular metal pillar in a stress buffer material includes depositing a polymer or a liquid molding compound.
The encapsulation of the annular metal pillar in stress buffer material, as previously described, uses either a polymer or a liquid molding compound. These materials are selected for their ability to conform to the shape of the pillar and provide effective stress buffering.
13. The method of claim 11 , wherein the step of removing some of the stress buffer material includes pressing a release film onto the topmost surface of the stress buffer material to depress the topmost surface.
The process of removing some of the stress buffer material from inside the annular metal pillar involves pressing a release film onto the top surface of the stress buffer material, depressing the top surface so that it is below the top edge of the annular metal pillar. This creates a recessed area within the pillar.
14. The method of claim 11 wherein the step of removing some of the stress buffer material includes exposing the topmost surface of the stress buffer material to a plasma clean process.
The method of removing some of the stress buffer material from inside the annular metal pillar uses a plasma cleaning process to etch away the top surface of the stress buffer material, creating a recess within the pillar.
15. The method of claim 14 , wherein the plasma clean process includes a process using argon and oxygen.
The plasma cleaning process used to remove some of the stress buffer material utilizes a gas mixture of argon and oxygen. This combination of gases provides an effective etching action for the specific type of stress buffer material.
16. The method of claim 10 , wherein the step of depositing a first conductive material within the annular pattern includes electroplating copper; and the step of depositing a second conductive material within the annular pattern and on the first conductive material comprises depositing solder on the copper.
In the method of forming an annular metal pillar, the process of depositing the first conductive material involves electroplating copper within the annular pattern. The subsequent step of depositing a second conductive material involves depositing solder on top of the copper layer, forming a solder cap on the copper pillar.
17. A method, comprising: forming a hollow metal pillar on a metal layer of a first device, wherein the metal layer and the hollow metal pillar are electrically connected; after the step of forming the hollow metal pillar, encapsulating the hollow metal pillar in a stress buffer material; and removing an upper surface of the stress buffer material to expose an upper surface of the hollow metal pillar.
A method involves forming a hollow metal pillar on a metal layer of a first device, making sure they are electrically connected. After the pillar is formed, the pillar is completely covered in a stress buffer material. Then, the upper surface of the stress buffer material is removed to reveal the upper surface of the hollow metal pillar.
18. The method of claim 17 , wherein the step of removing an upper surface of the stress buffer material includes pressing a release film onto the upper surface of the stress buffer material to press the upper surface of the stress buffer material to below the upper surface of the hollow metal pillar.
The method involving a hollow metal pillar encapsulated in a stress buffer includes removing the stress buffer material by pressing a release film onto the upper surface of the stress buffer, pressing the material down to below the level of the upper surface of the hollow metal pillar.
19. The method of claim 17 , further including removing a portion of the stress buffer material using a plasma clean process.
The method of forming a hollow metal pillar encapsulated in a stress buffer, involves removing a portion of the stress buffer using a plasma cleaning process, to expose the top surface of the pillar.
20. The method of claim 1 , further comprising removing a portion of the stress buffer layer disposed on a topmost surface of the hollow metal pillar.
The method for packaging integrated circuits involving a stress buffer layer filling and surrounding a hollow metal pillar also includes removing a portion of the stress buffer layer that is on the topmost surface of the hollow metal pillar, ensuring the pillar's top surface is exposed.
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April 11, 2016
June 13, 2017
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