A system and method for transferring data between a memory and peripheral units via a plurality of direct memory access (DMA) transactions, wherein a respective timestamp is assigned and/or appended to at least two of the plurality of the DMA transactions.
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1. A method for transferring data between a memory and a destination memory of a motor control device of a vehicle the method comprising: performing, by a DMA controller, a DMA transaction comprising a sequence of one or more DMA write transfers to write data to the destination memory of the motor control device of the vehicle, assigning a respective timestamp to a final DMA write transfer of the sequence of DMA write transfers and storing the timestamp at the destination memory for the DMA transaction; and proving that the destination memory of the motor control device has been refreshed to detect that the destination memory comprises current data associated with a current DMA transaction rather than a previous data associated with a previous DMA transaction, based on verifying that the timestamp associated with the current data is different from a timestamp associated with the previous data; using the data in the destination memory for controlling an actuator only if the destination memory is detected to comprise current data.
A method for reliable data transfer in a vehicle's motor control system uses DMA (Direct Memory Access) to write data from memory to the motor control device's memory. After a series of DMA writes, a timestamp is added to the final write and stored in the motor control device's memory. This timestamp ensures that the motor control device is using the latest data. Before using the data to control an actuator, the system checks the timestamp. If the current timestamp is different from the previous one, the data is considered current and safe to use. This prevents the actuator from using old or incorrect data.
2. The method of claim 1 , further comprising: using the timestamp assigned to compare a relative timing of different DMA transactions.
In addition to the method for reliable data transfer in a vehicle's motor control system using DMA, where a timestamp is assigned to the final DMA write transfer and stored at the destination memory for the DMA transaction to prove that the destination memory comprises current data; the timestamp assigned to different DMA transactions can be used to compare the relative timing of these DMA transactions. This allows developers to understand how the different DMA transfers are sequenced in time.
3. The method of claim 1 , further comprising: using the timestamp assigned to support tracking of different DMA transactions.
In addition to the method for reliable data transfer in a vehicle's motor control system using DMA, where a timestamp is assigned to the final DMA write transfer and stored at the destination memory for the DMA transaction to prove that the destination memory comprises current data; the timestamp assigned to a DMA transfer can be used to track the progress and completion of that DMA transfer. This can be useful for debugging or performance monitoring, allowing developers to correlate timestamp with specific data transfer events.
4. The method of the claim 2 , further comprising: using the timestamp assigned for the different DMA transactions for comparing a relative temporal completion of the respective DMA transactions.
Building upon the method that uses timestamps to compare the relative timing of different DMA transactions; the timestamp assigned for the different DMA transactions is used for comparing the relative temporal completion of the respective DMA transactions. This gives a precise way to order and compare DMA transfer completion times, helping to identify bottlenecks or delays in the data transfer process.
5. The method of claim 1 , further comprising: reporting of the timestamps assigned to a host central processing unit (CPU).
In addition to the method for reliable data transfer in a vehicle's motor control system using DMA, where a timestamp is assigned to the final DMA write transfer and stored at the destination memory for the DMA transaction to prove that the destination memory comprises current data; the assigned timestamps are reported to a host CPU. The CPU can use these timestamps for diagnostics, logging, or further analysis of the DMA transfer process. This enables higher-level system monitoring of data transfer operations.
6. The method of claim 1 , further comprising: generating the timestamp from an incrementing binary sequence or a free running timer counter to support comparison and arithmetic operations.
In addition to the method for reliable data transfer in a vehicle's motor control system using DMA, where a timestamp is assigned to the final DMA write transfer and stored at the destination memory for the DMA transaction to prove that the destination memory comprises current data; the timestamp is generated from an incrementing binary sequence or a free-running timer counter. This ensures that the timestamps are unique and comparable, allowing for accurate timing analysis and sequence verification through comparison and arithmetic operations.
7. The method of claim 1 , further comprising: when a final DMA transfer of a sequence of DMA transfers is completed, performing an additional transfer to latch the current value of a timer counter and move the current value to a next address in a destination memory structure.
In addition to the method for reliable data transfer in a vehicle's motor control system using DMA, where a timestamp is assigned to the final DMA write transfer and stored at the destination memory for the DMA transaction to prove that the destination memory comprises current data; when the final DMA transfer in a sequence is done, the system performs another transfer to capture the current value of a timer counter. This timer value, acting as the timestamp, is then stored in the next available address within a specific memory structure.
8. The method of claim 1 , further comprising: processing the timestamp assigned to check a temporal sequence of different DMA transactions.
In addition to the method for reliable data transfer in a vehicle's motor control system using DMA, where a timestamp is assigned to the final DMA write transfer and stored at the destination memory for the DMA transaction to prove that the destination memory comprises current data; the assigned timestamps are processed to verify the temporal order of DMA transfers. This verifies that data is transferred and processed in the correct sequence, which is important for real-time control and data integrity.
9. A system, comprising: a direct memory access (DMA) controller transfer section configured to transfer data between a memory and a motor control device of a vehicle via a DMA transaction comprising a sequence of one or more DMA write transfers to write data to a destination memory of the motor control device of the vehicle, an assignment circuitry configured to assign a respective timestamp to a final DMA write transfer of the sequence of DMA write transfers and store the timestamp at the destination memory for the DMA transaction, wherein the memory and the destination memory of the motor control device of the vehicle are separate physical entities, and a control circuitry adapted to prove that the destination memory of the motor control device has been refreshed to detect that the destination memory comprises current data associated with a current DMA transaction rather than a previous data associated with a previous DMA transaction, based on verifying that the timestamp associated with the current data is different from a timestamp associated with the previous data; wherein the control circuitry uses the data in the destination memory for controlling an actuator only if the destination memory is detected to comprise current data.
A system for reliable data transfer in a vehicle's motor control utilizes a DMA controller to move data between memory and the motor control device. The DMA controller writes data to a destination memory. An assignment circuit adds a timestamp to the last DMA write of each transfer and stores it in the destination memory. The memory and destination memory are separate. Control circuits confirm data freshness by comparing the current timestamp with the previous one. If the timestamps differ, the data is considered current and is then used by control circuitry to actuate a device.
10. A direct memory access (DMA) controller, comprising: a transfer section configured to transfer data between a memory and a motor control device of a vehicle via a plurality of direct memory access DMA transactions, wherein each DMA transaction comprises a sequence of one or more DMA write transfers to write data to a destination memory of the motor control device of the vehicle; and an assignment component configured to assign a timestamp to a final DMA write transfer of the sequence of DMA write transfers to the destination memory of the motor control device of the vehicle for the given DMA transaction and store the respective timestamp at an address of the destination memory of the motor control device of the vehicle, the address having a predetermined relationship to the resultant data written to the destination memory by the sequence of DMA write transfers of the given DMA transaction; wherein the assignment component uses the data in the destination memory for controlling an actuator only if the destination memory is detected to comprise current data associated with a current DMA transaction rather than a previous data associated with a previous DMA transaction, based on verifying that the timestamp associated with the current data is different from a timestamp associated with the previous data.
A DMA controller for reliable data transfer in a vehicle's motor control system transfers data between memory and the vehicle's motor control device through multiple DMA transactions. Each transaction writes data to the motor control device's destination memory. An assignment component adds a timestamp to the final write of each DMA transaction and stores it in a specific address of the destination memory. The address where the timestamp is stored has a defined relationship with the written data. The assignment component only uses the data for actuator control if it verifies that the timestamp of current data is different than the timestamp of previous data.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
July 26, 2013
August 8, 2017
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