A work function setting metal stack includes a configuration of layers including a high dielectric constant layer and a diffusion prevention layer formed on the high dielectric constant layer. An aluminum doped TiC layer has a thickness greater than 5 nm wherein the configuration of layers is employed between two regions as a diffusion barrier to prevent mass diffusion between the two regions.
Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.
1. A field effect transistor structure, comprising: a plurality of fins structures; a gate structure disposed over and between the fin structures, the gate structure including: a gate dielectric layer; a diffusion prevention layer formed on the gate dielectric; a continuous aluminum doped TiC layer having a thickness greater than 5 nm formed on the diffusion prevention layer and formed by pinching off portions of the aluminum doped TiC layer within the diffusion prevention layer to merge the portions without intervening layers between the portions; and source and drain regions formed on sides of the gate structure on the plurality of fin structures.
A field-effect transistor (FET) has multiple fin structures and a gate structure placed over and between them. The gate includes a gate dielectric (insulator), a diffusion prevention layer on the dielectric, and a continuous aluminum-doped titanium carbide (TiC) layer on the prevention layer. This TiC layer is greater than 5nm thick and is formed by pinching off portions of the TiC within the diffusion prevention layer, merging them without any intervening layers. Source and drain regions are formed on either side of the gate on the fins. This structure aims to improve work function stability and prevent mass diffusion.
2. The structure as recited in claim 1 , wherein the fin structures include semiconductor fins.
The field-effect transistor structure, already defined as having multiple fin structures and a gate structure with a gate dielectric, diffusion prevention layer, and aluminum-doped TiC layer greater than 5nm thick, specifies that the fin structures are made of semiconductor material. This means the fins are designed to conduct electricity under certain conditions, enabling the transistor's switching function.
3. The structure as recited in claim 1 , wherein the fin structures include two or more stacked nanosheets.
The field-effect transistor structure, already defined as having multiple fin structures and a gate structure with a gate dielectric, diffusion prevention layer, and aluminum-doped TiC layer greater than 5nm thick, specifies that the fin structures consist of two or more stacked nanosheets. This increases the effective channel width and drive strength of the transistor.
4. The structure as recited in claim 3 , wherein the two or more stacked nanosheets each includes a semiconductor layer and the semiconductor layers are separated by a work function setting metal stack including: a high dielectric constant layer; a diffusion prevention layer formed on the high dielectric constant layer; and an aluminum doped TiC layer having a thickness greater than 5 nm.
The field-effect transistor structure, with fin structures comprising two or more stacked nanosheets, has each nanosheet containing a semiconductor layer. These semiconductor layers are separated by a work function setting metal stack consisting of a high dielectric constant material, a diffusion prevention layer on the high dielectric, and an aluminum-doped TiC layer that is thicker than 5nm. This metal stack controls the electrical properties and prevents material mixing between the semiconductor layers.
5. The structure as recited in claim 4 , further comprising an interface layer formed on the semiconductor layer.
The field-effect transistor structure, with stacked nanosheets separated by a work function setting metal stack including a high dielectric constant layer, a diffusion prevention layer, and an aluminum doped TiC layer, further includes an interface layer formed on the semiconductor layer. This interface layer optimizes the contact and electrical properties between the semiconductor and the adjacent layer.
6. The structure as recited in claim 1 , wherein the diffusion prevention layer includes a TiN layer.
The field-effect transistor structure, already defined as having multiple fin structures and a gate structure with a gate dielectric, diffusion prevention layer, and aluminum-doped TiC layer greater than 5nm thick, specifies that the diffusion prevention layer is made of titanium nitride (TiN). TiN acts as a barrier to stop unwanted atoms from moving between layers.
7. The structure as recited in claim 1 , wherein the aluminum doped TiC layer includes an aluminum concentration of between about 20% and about 40%.
The field-effect transistor structure, already defined as having multiple fin structures and a gate structure with a gate dielectric, diffusion prevention layer, and aluminum-doped TiC layer greater than 5nm thick, specifies the aluminum doped TiC layer has an aluminum concentration between 20% and 40%. This aluminum concentration is crucial for tuning the work function of the TiC layer, impacting the transistor's performance.
8. A field effect transistor structure, comprising: a plurality of fins structures; a gate structure disposed over and between the fin structures, the gate structure including: a gate dielectric layer; a diffusion prevention layer formed on the gate dielectric; a continuous aluminum doped center layer formed on the diffusion prevention layer and formed by pinching off portions of the aluminum doped center layer within the diffusion prevention layer to merge the portions without intervening layers between the portions; and source and drain regions formed on sides of the gate structure on the plurality of fin structures.
A field-effect transistor (FET) has multiple fin structures and a gate structure placed over and between them. The gate includes a gate dielectric (insulator), a diffusion prevention layer on the dielectric, and a continuous aluminum-doped center layer on the prevention layer. The aluminum doped center layer is formed by pinching off portions of the layer within the diffusion prevention layer, merging them without any intervening layers. Source and drain regions are formed on either side of the gate on the fins. This structure aims to improve work function stability and prevent mass diffusion.
9. The structure as recited in claim 8 , wherein the fin structures include semiconductor fins.
The field-effect transistor structure, already defined as having multiple fin structures and a gate structure with a gate dielectric, diffusion prevention layer, and aluminum-doped center layer, specifies that the fin structures are made of semiconductor material. This means the fins are designed to conduct electricity under certain conditions, enabling the transistor's switching function.
10. The structure as recited in claim 8 , wherein the fin structures include two or more stacked nanosheets.
The field-effect transistor structure, already defined as having multiple fin structures and a gate structure with a gate dielectric, diffusion prevention layer, and aluminum-doped center layer, specifies that the fin structures consist of two or more stacked nanosheets. This increases the effective channel width and drive strength of the transistor.
11. The structure as recited in claim 10 , wherein the two or more stacked nano sheets each includes a semiconductor layer and the semiconductor layers are separated by a work function setting metal stack including: a high dielectric constant layer; a diffusion prevention layer formed on the high dielectric constant layer; and an aluminum doped TiC layer having a thickness greater than 5 nm.
The field-effect transistor structure, with fin structures comprising two or more stacked nanosheets, has each nanosheet containing a semiconductor layer. These semiconductor layers are separated by a work function setting metal stack consisting of a high dielectric constant material, a diffusion prevention layer on the high dielectric, and an aluminum-doped TiC layer that is thicker than 5nm. This metal stack controls the electrical properties and prevents material mixing between the semiconductor layers.
12. The structure as recited in claim 11 , further comprising an interface layer formed on the semiconductor layer.
The field-effect transistor structure, with stacked nanosheets separated by a work function setting metal stack including a high dielectric constant layer, a diffusion prevention layer, and an aluminum doped TiC layer, further includes an interface layer formed on the semiconductor layer. This interface layer optimizes the contact and electrical properties between the semiconductor and the adjacent layer.
13. The structure as recited in claim 8 , wherein the diffusion prevention layer includes a TiN layer.
The field-effect transistor structure, already defined as having multiple fin structures and a gate structure with a gate dielectric, diffusion prevention layer, and aluminum-doped center layer, specifies that the diffusion prevention layer is made of titanium nitride (TiN). TiN acts as a barrier to stop unwanted atoms from moving between layers.
14. The structure as recited in claim 8 , wherein the continuous aluminum doped center layer includes an aluminum doped TiC layer.
The field-effect transistor structure, already defined as having multiple fin structures and a gate structure with a gate dielectric, diffusion prevention layer, and aluminum-doped center layer, specifies that the continuous aluminum doped center layer is an aluminum doped TiC layer.
15. The structure as recited in claim 14 , wherein the aluminum doped TiC layer includes an aluminum concentration of between about 20% and about 40%.
The field-effect transistor structure, already defined as having multiple fin structures and a gate structure with a gate dielectric, diffusion prevention layer, and aluminum-doped TiC layer as the center layer, specifies that the aluminum doped TiC layer has an aluminum concentration between 20% and 40%. This aluminum concentration is crucial for tuning the work function of the TiC layer, impacting the transistor's performance.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
October 31, 2016
August 15, 2017
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