A semiconductor device including a first fin active area substantially parallel to a second fin active area, a first source/drain in the first fin active area, a second source/drain in the second fin active area, a first contact plug on the first source/drain, and a second contact plug on the second source/drain. The center of the second contact plug is offset from the center of the second source/drain.
Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.
1. A semiconductor device, comprising: a first fin active area; a second fin active area substantially parallel to the first fin active area; a first source/drain in the first fin active area; a second source/drain in the second fin active area; a first contact plug on the first source/drain; and a second contact plug on the second source/drain, wherein the second contact plug is only on one source/drain corresponding to the second source/drain and wherein a center of the second contact plug is offset from a center of the second source/drain.
A semiconductor device has two fin-shaped active areas running parallel to each other. There are two source/drain regions, one in each fin area. A contact plug connects to each source/drain region. The key feature is that the second contact plug is positioned in such a way that its center is not aligned with the center of its corresponding second source/drain region; it is offset. The second contact plug is connected to only one source/drain region.
2. The semiconductor device as claimed in claim 1 , wherein a bottom of the second contact plug has a different inclination from a bottom of the first contact plug.
This semiconductor device builds on the structure described previously. In addition to the offset contact, the bottom surface of the second contact plug (the one with the offset) has a different angle or slope compared to the bottom surface of the first contact plug. This means the two contact plugs are shaped differently at their base.
3. The semiconductor device as claimed in claim 1 , further comprising: an inclined interface between the second contact plug and the second source/drain, the inclined interface at a higher level in a direction approaching the first fin active area and at a lower level in a direction away from the first fin active area.
This semiconductor device builds on the initial description with an inclined interface. The interface where the second contact plug meets the second source/drain is sloped. This inclined interface is higher up (vertically) closer to the first fin and lower down away from the first fin active area. This creates a tilted connection between the contact plug and the source/drain.
4. The semiconductor device as claimed in claim 1 , wherein a distance between a vertical center of the first contact plug and a vertical center of the second contact plug is greater than a distance between a vertical center of the first source/drain and a vertical center of the second source/drain.
In this semiconductor device, the vertical distance between the centers of the two contact plugs is greater than the vertical distance between the centers of the two source/drain regions. This means the contact plugs are spaced further apart vertically than the source/drain regions they connect to. This creates a larger separation of the contact plugs with respect to the source/drain.
5. The semiconductor device as claimed in claim 1 , wherein a lower end of the second contact plug is at a lower level than a lower end of the first contact plug.
In this semiconductor device, the bottom of the second contact plug (the one with the offset) sits lower than the bottom of the first contact plug. The height of the first contact plug is greater than the height of the second contact plug.
6. The semiconductor device as claimed in claim 1 , wherein: a horizontal width of the first source/drain is greater than a horizontal width of the first fin active area, and a horizontal width of the second source/drain is greater than a horizontal width of the second fin active area.
This semiconductor device specifies the width of the source/drain. The horizontal width of the first source/drain is wider than the horizontal width of the first fin active area it sits in. Similarly, the horizontal width of the second source/drain is wider than the horizontal width of the second fin active area it is located in.
7. The semiconductor device as claimed in claim 1 , wherein a farthest point of an interface between the second contact plug and the second source/drain from a vertical line passing through a center of the first source/drain is at a lower level than a closest point of the interface between the second contact plug and the second source/drain to the vertical line passing through the center of the first source/drain.
This semiconductor device features an interface between the second contact plug (offset) and the second source/drain with an inclined interface. Imagine a vertical line running through the center of the *first* source/drain. The point on the second contact plug to second source/drain interface that's farthest from this line sits lower than the point on that same interface that's closest to the line. This further defines the tilt or slope of the interface between the offset contact and its source/drain.
8. The semiconductor device as claimed in claim 1 , further comprising: a third fin active area substantially parallel to the second fin active area; a third source/drain in the third fin active area; and a third contact plug on the third source/drain, wherein the second fin active area is between the first fin active area and the third fin active area, and wherein a center of the third contact plug is offset from a center of the third source/drain.
The semiconductor device from claim 1 contains a third fin active area parallel to the others with a corresponding source/drain and contact plug. The second fin is located between the first and third fins. Similar to the second contact plug, the third contact plug is also offset from the center of its corresponding third source/drain. So, you have two offset contacts.
9. A semiconductor device, comprising: first and second pull-up transistors; first and second pull-down transistors; first and second access transistors; a first contact plug adjacent to the second pull-up transistor; and a second contact plug adjacent to the second pull-down transistor, wherein a first source/drain in a first fin active area of the second pull-up transistor is connected to the first contact plug, a second source/drain in a second fin active area of the second pull-down transistor is connected to the second contact plug, and a center of the second contact plug is offset from a center of the second source/drain.
A semiconductor device contains transistors: first and second pull-up, first and second pull-down, and first and second access transistors. There are two key contact plugs: one close to the second pull-up transistor, and the second close to the second pull-down transistor. The first source/drain within the first fin of the second pull-up is connected to the first contact plug. The second source/drain within the second fin of the second pull-down transistor connects to the second contact plug. The second contact plug is offset, such that it's not centered over the second source/drain.
10. The semiconductor device as claimed in claim 9 , wherein the second fin active area is substantially parallel to the first fin active area.
In the semiconductor device described previously, the second fin (where the second pull-down transistor's source/drain is located) runs substantially parallel to the first fin (where the second pull-up transistor's source/drain is located).
11. The semiconductor device as claimed in claim 9 , wherein: the first source/drain includes P-type impurities, and the second source/drain includes N-type impurities.
In the semiconductor device from claim 9, the first source/drain (connected to the first contact plug near the second pull-up transistor) is doped with P-type impurities. The second source/drain (connected to the offset contact near the second pull-down transistor) is doped with N-type impurities.
12. The semiconductor device as claimed in claim 9 , wherein: the first source/drain includes a crystal-growth SiGe layer, and the second source/drain includes a crystal-growth Si layer, a crystal-growth SiC layer, or a combination thereof.
In the semiconductor device described in claim 9, the first source/drain (near the second pull-up transistor) contains a crystal-growth SiGe (silicon germanium) layer. The second source/drain (near the second pull-down transistor with the offset contact) contains a crystal-growth Si (silicon) layer, a crystal-growth SiC (silicon carbide) layer, or a combination of both.
13. The semiconductor device as claimed in claim 9 , a distance between a vertical center of the first contact plug and a vertical center of the second contact plug is greater than a distance between a vertical center of the first source/drain and a vertical center of the second source/drain.
Building on the transistor layout of claim 9, the vertical distance between the center of the first contact plug and the center of the second contact plug (the offset one) is greater than the vertical distance between the center of the first source/drain and the center of the second source/drain.
14. The semiconductor device as claimed in claim 9 , further comprising: a third contact plug adjacent to the first pull-down transistor, wherein a third source/drain in a third fin active area of the first pull-down transistor is connected to the third contact plug, and a center of the third contact plug is offset from a center of the third source/drain.
Building on the transistor arrangement of claim 9, a third contact plug is placed next to the *first* pull-down transistor. A third source/drain in a third fin active area of the first pull-down transistor is connected to the third contact plug. The center of this third contact plug is also offset from the center of its third source/drain.
15. A semiconductor device, comprising: a first source/drain area; a second source/drain area; a first contact plug on the first source/drain area; and a second contact plug on the second source/drain area, wherein a center of the second contact plug is offset from a center of the second source/drain, wherein a farthest point of an interface between the second contact plug and the second source/drain area from a vertical line passing through the center of the first source/drain area is at a lower level than a closest point of the interface between the second contact plug and the second source/drain area to the vertical line passing through the center of the first source/drain area.
A semiconductor device includes a first and second source/drain area, with a contact plug on each. The critical feature is that the second contact plug is offset; its center is not aligned with the center of the second source/drain area. Additionally, the farthest point of the interface between the second (offset) contact plug and the second source/drain area, when measured from a vertical line through the center of the *first* source/drain area, is at a lower height than the closest point on that same interface.
16. The semiconductor device as claimed in claim 15 , wherein the first contact plug is adjacent the second contact plug.
The semiconductor device from claim 15 has the first and second contact plugs placed next to each other.
17. The semiconductor device as claimed in claim 15 , wherein: the center of the first contact plug is spaced from the center of the second contact plug by a first distance; the center of the first source/drain area is spaced from the center of the second source/drain area by a second distance; and the first distance is greater than the second distance.
In the semiconductor device with the offset contact from claim 15, the center of the first contact plug and the center of the second contact plug are separated by a certain distance. The centers of the first and second source/drain areas are also separated by a distance. The distance between the *contact plugs* is *greater* than the distance between the *source/drain areas*.
18. The semiconductor device as claimed in claim 15 , wherein a lower surface of the second contact plug is inclined.
Building on the offset contact design of claim 15, the lower surface of the second contact plug (the one with the offset) is inclined, meaning it has a slope.
19. The semiconductor device as claimed in claim 15 , wherein: a lower surface of the first contact plug has a first shape; a lower surface of the second contact plug has a second shape; and the first shape is different from the second shape.
The semiconductor device with the offset contact from claim 15 features differences in shape. The lower surface of the first contact plug has one shape, and the lower surface of the second (offset) contact plug has a *different* shape.
20. The semiconductor device as claimed in claim 15 , further comprising: a third source/drain area; and a third contact plug on the third source/drain area, wherein the second source/drain area is between the first source/drain area and the third source/drain area, and a center of the third contact plug is offset from a center of the third source/drain area.
Building on the device described in claim 15, the semiconductor also includes a third source/drain area and a third contact plug on it. The second source/drain area is located between the first and third source/drain areas. The center of the third contact plug is offset from the center of the third source/drain area, similar to the second contact plug.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
February 22, 2016
August 29, 2017
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