A method of forming a semiconductor device includes following steps. Firstly, a substrate having a transistor is provided, where the transistor includes a source/drain region. A dielectric layer is formed on the substrate, and a contact plug is formed in the dielectric layer to electrically connect the source/drain region. Next, a mask layer is formed on the dielectric layer, where the mask layer includes a first layer and a second layer stacked thereon. After this a slot-cut pattern is formed on the second layer of the mask layer, and a contact slot pattern is formed on the first layer of the mask layer. Finally, the second layer is removed and a contact opening is formed by using the contact slot pattern on the first layer.
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1. A method of forming a semiconductor device, comprising: providing a substrate having a transistor, wherein the transistor comprises a gate structure and a source/drain; forming a first dielectric layer covering the substrate; forming a first contact plug in the first dielectric layer, wherein the first contact plug is electrically connected to the source/drain; forming a second dielectric layer on the first dielectric layer; forming a mask layer on the second dielectric layer, wherein the mask layer comprises a multilayer structure having a first layer and a second layer stacked on the first layer; patterning the second layer to form a slot-cut pattern; forming a sacrificial mask layer on the slot-cut pattern; forming two contact slot patterns in the first layer and the sacrificial mask layer, wherein one of the contact slot patterns penetrates the sacrificial mask layer and the first layer, and another one of the contact slot patterns penetrates the sacrificial mask layer and partially penetrates the slot cut pattern; removing the sacrificial layer and the second layer; and forming a first contact slot in the second dielectric layer through the contact slot pattern in the first layer.
A method for making a semiconductor device involves these steps: Start with a substrate containing a transistor with a gate and source/drain regions. Cover the substrate with a first dielectric (insulating) layer. Create a first contact plug within this dielectric layer to connect electrically to the source/drain. Add a second dielectric layer on top. Form a mask layer on this second dielectric; this mask consists of two layers: a first layer and a second layer stacked on it. Pattern the second layer to create a slot-cut pattern. Form a sacrificial mask layer on the slot-cut pattern. Create two contact slot patterns in the first layer and the sacrificial mask layer, one cutting through the sacrificial mask layer and first layer, the other cutting through the sacrificial mask layer and partially through the slot-cut pattern. Remove the sacrificial layer and the second layer. Finally, etch a first contact slot in the second dielectric layer using the pattern in the remaining first layer of the mask.
2. The method of forming a semiconductor device according to claim 1 , further comprising: forming the first contact slot to expose a top surface of the first contact plug; and forming a second contact plug in the first contact slot, wherein the second contact plug is electrically connected to the first contact plug.
After performing the method for making a semiconductor device described in Claim 1 (substrate with transistor, dielectric layers, mask with two layers, sacrificial mask layer, slot-cut and contact slot patterning, sacrificial layer removal, forming first contact slot), expose the top of the first contact plug during the creation of the first contact slot in the second dielectric layer. Then, create a second contact plug inside this first contact slot so it connects electrically to the first contact plug below.
3. The method of forming a semiconductor device according to claim 1 , wherein, the second layer comprises oxide, silicon nitride, or silicon carbonitride, and the first layer comprises titanium, titanium nitride, tantalum or tantalum nitride.
In the method for making a semiconductor device described in Claim 1 (substrate with transistor, dielectric layers, mask with two layers, sacrificial mask layer, slot-cut and contact slot patterning, sacrificial layer removal, forming first contact slot), the second layer of the mask (the one patterned with the slot-cut) can be made of oxide, silicon nitride, or silicon carbonitride. The first layer of the mask (used to create the first contact slot pattern) can be made of titanium, titanium nitride, tantalum, or tantalum nitride.
4. The method of forming a semiconductor device according to claim 1 , further comprising: forming a patterned sacrificial mask layer on the second dielectric layer; and forming a second contact slot in the second dielectric layer and the first dielectric layer through the patterned sacrificial mask layer.
Following the method for making a semiconductor device described in Claim 1 (substrate with transistor, dielectric layers, mask with two layers, sacrificial mask layer, slot-cut and contact slot patterning, sacrificial layer removal, forming first contact slot), form a patterned sacrificial mask layer on top of the second dielectric layer. Then, etch a second contact slot through both the second and first dielectric layers, using this patterned sacrificial mask layer as the etching guide.
5. The method of forming a semiconductor device according to claim 4 , further comprising: forming a third contact plug in the second contact slot, wherein the third contact plug is electrically connected to the gate structure.
After the process of forming the semiconductor device as described in claim 4 (patterned sacrificial mask layer on top of the second dielectric layer, etching a second contact slot through both the second and first dielectric layers), create a third contact plug within this second contact slot. This third contact plug makes an electrical connection to the gate structure of the transistor.
6. The method of forming a semiconductor device according to claim 1 , further comprising: forming an etch stop layer between the first dielectric layer and the second dielectric layer, wherein the forming of the first contact slot comprises using the etch stop layer as a stop layer to form a contact slot.
In the method for making a semiconductor device described in Claim 1 (substrate with transistor, dielectric layers, mask with two layers, sacrificial mask layer, slot-cut and contact slot patterning, sacrificial layer removal, forming first contact slot), insert an etch-stop layer between the first and second dielectric layers. When etching the first contact slot in the second dielectric, use this etch-stop layer to precisely control the etch depth and prevent damage to underlying structures.
7. The method of forming a semiconductor device according to claim 6 , further comprising: forming a patterned sacrificial mask layer on the second dielectric layer, wherein the patterned sacrificial mask layer is filled in the contact slot; and forming a second contact slot in the second dielectric layer and the first dielectric layer through the patterned sacrificial mask layer.
Further to the method of forming a semiconductor device as described in claim 6 (etch-stop layer between first and second dielectric layer), create a patterned sacrificial mask layer on the second dielectric layer, filling the first contact slot etched using the etch stop layer as a stop layer. Then etch a second contact slot through the second and first dielectric layers, using the patterned sacrificial mask as an etch guide.
8. The method of forming a semiconductor device according to claim 7 , wherein, the gate structure comprises a capping layer, and the forming of the second contact slot comprises forming the second contact slot by using the capping layer as a stop layer, to form a contact slot.
Building on the process of forming a semiconductor device from claim 7 (patterned sacrificial mask layer on the second dielectric layer, filling the first contact slot, then etch a second contact slot through the second and first dielectric layers), the gate structure includes a capping layer. During the formation of the second contact slot, use the capping layer as an etch-stop layer to precisely control the depth of the etch and prevent damage to the gate structure.
9. The method of forming a semiconductor device according to claim 8 , further comprising: performing a removing process to simultaneously remove a portion of the etch stop layer and a portion of the capping layer to form the first contact slot and the second contact slot; and forming a second contact plug in the first contact slot, and simultaneously forming a third contact plug in the second contact slot, wherein the second contact plug is electrically connected to the first contact plug and the third contact plug is electrically connected to the gate structure.
Building upon the method of forming a semiconductor device from claim 8 (gate structure with a capping layer, capping layer used as an etch-stop layer), perform an etch process that simultaneously removes part of the etch-stop layer between the dielectric layers and part of the gate's capping layer to form both the first and second contact slots. Simultaneously create a second contact plug in the first contact slot (connecting to the first contact plug) and a third contact plug in the second contact slot (connecting to the gate structure).
10. The method of forming a semiconductor device according to claim 1 , wherein a top surface of the first contact plug is formed to be higher than a top surface of the gate structure.
In the method for making a semiconductor device described in Claim 1 (substrate with transistor, dielectric layers, mask with two layers, sacrificial mask layer, slot-cut and contact slot patterning, sacrificial layer removal, forming first contact slot), the top surface of the first contact plug (connected to the source/drain) is higher than the top surface of the gate structure.
11. The method of forming a semiconductor device according to claim 1 , further comprising: forming the first dielectric layer in a bilayer structure, wherein the first dielectric layer comprises an interlayer dielectric layer level with a top surface of the gate structure and a dielectric layer level with a top surface of the first contact plug.
In the method for making a semiconductor device described in Claim 1 (substrate with transistor, dielectric layers, mask with two layers, sacrificial mask layer, slot-cut and contact slot patterning, sacrificial layer removal, forming first contact slot), the first dielectric layer is not a single layer, but a bilayer structure. It consists of an interlayer dielectric layer that is level with the top of the gate structure, and another dielectric layer that is level with the top of the first contact plug.
12. The method of forming a semiconductor device according to claim 11 , wherein the forming of the first contact plug comprises: forming a third contact slot in the dielectric layer and the interlayer dielectric layer to expose the source/drain; filling a first metal material layer in the third contact slot; and performing a planarization process.
In the method for making a semiconductor device described in Claim 11 (first dielectric layer is a bilayer structure), creating the first contact plug involves: etching a third contact slot through both dielectric layers to expose the source/drain region. Then, fill this third contact slot with a first metal material. Finally, perform a planarization process (like CMP) to create a flat surface.
13. The method of forming a semiconductor device according to claim 12 , further comprising: forming a first patterned mask layer on the first dielectric layer; forming a second patterned mask layer on the first dielectric layer, wherein a pattern on the first patterned mask layer crosses a pattern on the second patterned mask layer; and forming the third contact slot through the patterns of the first patterned mask layer and the second patterned mask layer.
Building upon the process of claim 12 (creating the first contact plug by etching a third contact slot, filling with a metal, planarization), create a first patterned mask on the first dielectric layer and then create a second patterned mask layer, where the pattern of the first mask crosses over the pattern of the second mask. The third contact slot to the source/drain is etched using both the crossing patterns of the first and second mask layers.
14. The method of forming a semiconductor device according to claim 13 , wherein the second patterned mask layer comprises a tri-layer structure.
Building on the method of claim 13 (creating third contact slot with crossing patterns), the second patterned mask (that crosses the first mask) is itself a three-layer structure.
15. The method of forming a semiconductor device according to claim 12 , comprising: performing a self-aligned silicidation process to form a silicide layer on the source/drain exposed by the third contact slot.
Following the method described in Claim 12 (creating the first contact plug by etching a third contact slot, filling with a metal, planarization), perform a self-aligned silicidation process. This creates a silicide layer on the surface of the source/drain that is exposed by the third contact slot.
16. The method of forming a semiconductor device according to claim 1 , further comprising: providing a fin structure in the substrate, wherein the source/drain is formed in the fin structure.
In the method for making a semiconductor device described in Claim 1 (substrate with transistor, dielectric layers, mask with two layers, sacrificial mask layer, slot-cut and contact slot patterning, sacrificial layer removal, forming first contact slot), the substrate includes a fin structure. The source/drain regions of the transistor are formed within this fin structure.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
January 28, 2015
September 5, 2017
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