To enhance the performance of a semiconductor device. In a method for manufacturing a semiconductor device, a metal film is formed over a semiconductor substrate having an insulating film formed on a surface thereof, and then the metal film is removed in a memory cell region, whereas, in a part of a peripheral circuit region, the metal film is left. Next, a silicon film is formed over the semiconductor substrate, then the silicon film is patterned in the memory cell region, and, in the peripheral circuit region, the silicon film is left so that an outer peripheral portion of the remaining metal film is covered with the silicon film. Subsequently, in the peripheral circuit region, the silicon film, the metal film, and the insulating film are patterned for forming an insulating film portion formed of the insulating film, a metal film portion formed of the metal film, and a conductive film portion formed of the silicon film.
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1. A semiconductor device comprising: a semiconductor substrate; a first gate insulating film formed over the semiconductor substrate; and a first gate electrode formed over the first gate insulating film, wherein the first gate electrode includes: a first film portion formed of a first conductive film over the first gate insulating film; and a second film portion formed of a second conductive film over the first film portion, and wherein a side surface of one end portion, in the first film portion, in a gate width direction of the first gate electrode is covered with the second film portion.
A semiconductor device features a substrate, an insulating layer on the substrate, and a gate electrode on the insulating layer. The gate electrode consists of a first conductive film directly on the insulating layer and a second conductive film on top of the first film. A key feature is that one end of the bottom conductive film is covered on its side by the second conductive film, offering enhanced protection or electrical properties.
2. The semiconductor device according to claim 1 , further comprising: a first active region formed in a first region on a first principal surface side of the semiconductor substrate; and a first element isolating region which is formed in the first region on the first principal surface side of the semiconductor substrate and which defines the first active region, wherein the first gate insulating film is formed over the first active region, and wherein the one end portion, in the first film portion, in the gate width direction is arranged over the first element isolating region.
This semiconductor device builds upon the previous description. It includes an active region and an isolation region on the substrate. The gate insulating film is formed over the active region. The end of the bottom conductive film (covered by the second conductive film) sits directly above the isolation region. This placement affects the electrical characteristics of the transistor, possibly reducing parasitic capacitance or improving breakdown voltage at the edge of the active region.
3. The semiconductor device according to claim 1 , wherein the first gate insulating film is formed in a first region on a first principal surface side of the semiconductor substrate, the semiconductor device further comprising: a second gate insulating film formed over the semiconductor substrate in a second region on the first principal surface side of the semiconductor substrate; a second gate electrode formed over the second gate insulating film; a third gate electrode which is formed over the semiconductor substrate in the second region and which is adjacent to the second gate electrode; and a first insulating film which is formed between the third gate electrode and the semiconductor substrate and between the second gate electrode and the third gate electrode, and which has a charge storage section therein.
This semiconductor device includes a first gate insulating film, a second gate insulating film, a second gate electrode, a third gate electrode next to the second, and a first insulating film between the third gate electrode and the substrate and between the second and third gate electrodes, that includes a charge storage section. In other words, in addition to the structure described in claim 1, a non-volatile memory component is included. The first gate insulating film and electrode from claim 1 are in one region, and the other components described in this claim are in a second region.
4. The semiconductor device according to claim 3 , wherein the semiconductor device comprises a nonvolatile memory formed in the second region on the first principal surface side of the semiconductor substrate, and wherein the second gate electrode and the third gate electrode are gate electrodes constituting the nonvolatile memory.
This semiconductor device as in Claim 3, is specifically a non-volatile memory device. The second and third gate electrodes from Claim 3 are the specific gate electrodes used to implement the non-volatile memory functionality. This includes elements such as floating gates or charge trapping layers.
5. A semiconductor device comprising: a semiconductor substrate; a first gate insulating film formed over the semiconductor substrate; a first gate electrode formed over the first insulating film; and a sidewall spacer formed over a side of the first gate electrode, wherein the first gate electrode includes a first conductive film over the first insulating film and a second conductive film over the first conductive film, wherein, as viewed in a cross section, the first conductive film has a first end portion and a second end portion opposite to the first end portion, and wherein, as viewed in the cross section, a side surface of the first end portion of the first conductive film is covered with the second conductive film.
A semiconductor device comprises: a substrate, a first insulating layer, and a first gate electrode. Sidewall spacers are formed on the sides of the first gate electrode. The first gate electrode is formed of a first conductive film and a second conductive film above it. In cross-section, the first conductive film has two ends, and one end is covered on its side by the second conductive film. This arrangement provides benefits such as improved gate integrity or reduced parasitic effects.
6. The semiconductor device according to claim 5 , wherein, the side surface of the first end portion of the first conductive film is in contact with the second conductive film.
This semiconductor device builds upon the description in claim 5, with the key detail that the side surface of the first conductive film's end is *directly* in contact with the second conductive film. This direct contact maximizes the electrical and physical interaction between the two films, which could optimize conductivity, reduce resistance, or improve adhesion.
7. The semiconductor device according to claim 6 , wherein the first conductive film includes a titanium nitride film, a tantalum nitride film, a tungsten nitride film, a titanium carbide film, a tantalum carbide film, a tungsten carbide film, a tantalum carbide nitride film, or a tungsten film, and wherein the second conductive film includes a silicon film.
The semiconductor device described in claim 6 specifies material composition. The first conductive film can be titanium nitride, tantalum nitride, tungsten nitride, titanium carbide, tantalum carbide, tungsten carbide, tantalum carbide nitride or tungsten. The second conductive film is silicon. So, this is a structure where the first film is a metal compound, and the second film is silicon, used to cover the side of the first film.
8. The semiconductor device according to claim 7 , further comprising: a first active region formed in a first region on a main surface side of the semiconductor substrate; and a field isolation oxide region which is formed in the first region on the main surface side of the semiconductor substrate and which defines the first active region, wherein the first gate insulating film is formed over the first active region, and wherein the first end portion of the first conductive film is arranged over the field isolation oxide region.
This semiconductor device builds upon the description in claim 7, adding details about the surrounding structure. An active region and a field isolation region are formed in the substrate. The gate insulating film is formed over the active region. Crucially, the end of the first conductive film that's covered by the second conductive film is located *over* the field isolation region. This is a specific placement designed for a purpose, such as managing electric fields or reducing leakage current.
9. The semiconductor device according to claim 7 , wherein the first gate insulating film is formed in a first region on a main surface side of the semiconductor substrate, the semiconductor device further comprising: a second gate insulating film formed over the semiconductor substrate in a second region on the main surface side of the semiconductor substrate; a second gate electrode formed over the second gate insulating film; a third gate electrode which is formed over the semiconductor substrate in the second region and which is adjacent to the second gate electrode via a first insulating film; and the first insulating film which is formed between the third gate electrode and the semiconductor substrate and between the second gate electrode and the third gate electrode, and which has a charge storage portion therein.
Building on the description in claim 7, this device adds a non-volatile memory element. Besides the first gate insulating film from claim 7, there is a second gate insulating film. Then, a second gate electrode, and a third gate electrode adjacent to the second gate electrode, are included. An insulating film is formed between the third gate electrode and the semiconductor substrate, as well as between the second and third gate electrodes, and includes a charge storage portion (e.g., a floating gate). The structure from claim 7 co-exists with the non-volatile memory element.
10. The semiconductor device according to claim 9 , wherein the second gate electrode and the third gate electrode are gate electrodes constituting a nonvolatile memory.
This semiconductor device as in Claim 9, clarifies that the second and third gate electrodes of Claim 9 are gate electrodes that make up a nonvolatile memory device. This means the semiconductor device has combined logic and non-volatile memory functionality.
11. The semiconductor device according to claim 5 , wherein the second conductive film separates the first end portion of the first conductive film and the sidewall spacer from each other.
The semiconductor device from Claim 5 clarifies that the second conductive film not only covers the side of the first conductive film but *separates* that end from the sidewall spacer. This separation prevents direct contact between the first conductive film and the spacer, potentially improving device reliability or performance by influencing the electric field distribution or preventing unwanted reactions between the materials.
12. The semiconductor device according to claim 1 , wherein the second film portion directly contacts the first gate insulating film.
This semiconductor device according to claim 1 specifies that the second film portion (the second conductive film) directly contacts the first gate insulating film (the gate dielectric). Thus, the second conductive film sits directly on the gate dielectric, surrounding part of the first conductive film. This configuration can affect the gate capacitance and transistor performance.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
February 19, 2016
October 3, 2017
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