Patentable/Patents/US-RE050864-B2
US-RE050864-B2

Liquid crystal display

PublishedApril 14, 2026
Assigneenot available in USPTO data we have
InventorsUnknown
Technical Abstract

A liquid crystal display includes first and second gate lines and first and second data lines, on a first substrate, a first thin film transistor connected to the first gate and data lines and including a first source and drain electrode, a second thin film transistor connected to the second gate and data lines and including a second source and drain electrode, first and second pixel electrodes contacting a portion of the first and second drain electrodes, respectively, a passivation layer on the first and second pixel electrodes and the first and second thin film transistors, and a reference electrode on a passivation layer and overlapping the first pixel electrode and the second pixel electrode. The reference electrode includes a plurality of branch electrodes. The first thin film transistor is right of the first data line and the second thin film transistor is left of the second data line.

Patent Claims

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Raw Claims Text

Original claims text from the patent document.

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Claim 47: 47. A liquid crystal display, comprising:

Claim 48: 48. The liquid crystal display of, wherein: the first data line and the second data line each include a curved portion.

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Detailed Description

Complete technical specification and implementation details from the patent document.

This application is a continuation reissue application of U.S. Pat. No. 8,773,605. More than one reissue application has been filed for the reissue of U.S. Pat. No. 8,773,605. The more than one reissue application is U.S. patent application Ser. No. 16/416,878, filed on Mary 20, 2019now issued as Reissue Pat. No. RE49,271, U.S. patent application Ser. No. 15/205,768, filed on Jul. 8, 2016 and issued as RE47455, and the present application. This application is a continuation of U.S. patent application Ser. No. 16/416,878, which is a continuation reissue application of U.S. patent application Ser. No. 15/205,768, which is a reissue application of U.S. patent application Ser. No. 12/915,320, filed on Oct. 29, 2010, which claims priority to Korean Patent Application No. 10-2010-0064694 filed on Jul. 6, 2010, and all the benefits accruing therefrom under 35 U.S.C. §119, the entire contents of which are incorporated herein by reference.

(a) Field of the Invention

The invention relates to a liquid crystal display.

(b) Description of the Related Art

A liquid crystal display (“LCD”) is one of the most widely used flat panel displays.

The liquid crystal display includes two bases of a display panel on which a field generating electrode is formed, and a liquid crystal layer interposed between the two bases. The liquid crystal display generates an electric field in the liquid crystal layer by applying voltage to the field generating electrodes, to determine a direction of liquid crystal molecules of the liquid crystal layer and controls the transmittance of light passing through the liquid crystal layer.

The liquid crystal display is advantageous in sliminess, but may have side visibility lower than front visibility. In order to overcome the problem of lower side visibility, various types of liquid crystal arrays and driving methods thereof have been developed.

As a method for implementing a wide viewing angle, a liquid crystal display where pixel electrodes and common electrodes are formed on one substrate, has been in the limelight.

However, in the case of the liquid crystal display, since a pixel electrode and a reference electrode are formed on one substrate, parasitic capacitance between the two electrodes and a data line may be increased.

In order to reduce the parasitic capacitance, when the interval between the two electrodes and the data line is increased, the aperture ratio can be reduced.

In addition, in order to increase the aperture ratio, when the reference electrode is formed on the data line, the data load is increased, thereby making it possible to increase the power consumption.

The invention provides a liquid crystal display having advantages of reducing power consumption, without reducing the aperture ratio of a liquid crystal display.

An exemplary embodiment of the invention provides a liquid crystal display, including a first substrate, a first gate line, a second gate line, a first data line, and a second data line on the first substrate, a first thin film transistor connected to the first gate line and the first data line and including a first source electrode and a first drain electrode, a second thin film transistor connected to the second gate line and the second data line and including a second source electrode and a second drain electrode, a first pixel electrode which contacts a portion of the first drain electrode and a second pixel electrode which contacts a portion of the second drain electrode, a passivation layer on the first pixel electrode, the second pixel electrode, the first thin film transistor, and the second thin film transistor, and a reference electrode on a passivation layer and overlaps the first pixel electrode and the second pixel electrode. The reference electrode includes a plurality of branch electrodes. The first thin film transistor is positioned at the right of the first data line, and the second thin film transistor is positioned at the left of the second data line.

The first data line and the second data line may each include a curved portion.

The first data line may intersect with the first gate line forming a first tilt angle therebetween, and the second data line may intersect with the second gate line forming a second tilt angle therebetween.

The first thin film transistor may be positioned between the first gate line and the first data line forming the first tilt angle, and the second thin film transistor may be positioned between the second gate line and the second data line forming the second tilt angle. Both of the first tilt angle and the second tilt angle may be an acute angle.

The first thin film transistor may be positioned in a first pixel area and the second thin film transistor may be positioned in a second pixel area. The first pixel area and the second pixel area may be vertically adjacent to each other. A driving method of a signal applied to the first thin film transistor and the second thin film transistor may use a column inversion method.

A first signal may be applied to the first thin film transistor through the first data line, and a second signal may be applied to the second thin film transistor through the second data line. The first signal and the second signal may have different polarities

The first pixel area and the second pixel area may be alternately disposed in a column direction.

A first unit in which the first pixel area is repeated at least twice, and a second unit in which the second pixel area is repeated at least twice, may be alternately disposed in the column direction.

The first thin film transistor may be positioned between the first gate line and the first data line forming a first tilt angle, and the second thin film transistor may be positioned between the second gate line and the second data line forming a second tilt angle. The first tilt angle may be an obtuse angle and the second tilt angle may be an acute angle.

The plurality of branch electrodes may be positioned in parallel with a direction where the first data line and the second data line extend.

The reference electrode includes horizontal connection units that connect the branch electrodes to each other, and vertical connection units that connect the horizontal connection units to each other. The vertical connection unit overlaps with at least one of the first data line and the second data line.

The reference electrode may have an opening unit exposing the first thin film transistor and a portion of the first data line, or exposing the second thin film transistor and a portion of the second data line.

The liquid crystal display may further include a reference voltage line positioned on the first substrate. The reference voltage line may be connected to the reference electrode through a contact hole extending through the passivation layer.

The reference voltage line may comprise a connection unit contacting the reference electrode through the contact hole and extended from the reference voltage line.

An array of the connection unit in pixel areas of the liquid crystal display, may be alternately disposed at the left and right of the first data line or the second data line, respectively.

The reference voltage line may be positioned at a central portion of a pixel area of the liquid crystal display.

The first pixel electrode or the second pixel electrode may not overlap a contact portion of the reference voltage line and the reference electrode.

The reference electrodes disposed at the pixel areas adjacent to each other, may be connected to each other.

The first source electrode may be positioned on the same line as the first data line, and the second source electrode may be positioned on the same line as the second data line. The first drain electrode may extend in parallel with the first source electrode, and the second drain electrode may extend in parallel with the second source electrode.

The liquid crystal display may further include a reference voltage line positioned on the first substrate. The reference voltage line is connected to the reference electrode through a contact hole extending through the passivation layer, and the reference voltage line is positioned at a portion adjacent to the gate line. The first pixel electrode may cover a part of the first drain electrode to be connected to the first drain electrode, and the second pixel electrode may cover a part of the second drain electrode to be connected to the second drain electrode.

The liquid crystal display may further include a second substrate opposite to the first substrate, and a liquid crystal layer between the first substrate and the second substrate and has positive dielectric anisotropy.

According to the exemplary embodiment of the invention, it can reduce the power consumption due to the increase in the data load while maximizing the aperture ratio.

The invention will be described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the invention. Rather, the exemplary embodiments set forth herein are provided to a person of ordinary skilled in the art to thoroughly and completely understand contents disclosed herein and fully provide the spirit of the invention.

In the drawings, the shapes and sizes of elements may be exaggerated for clarity. Like reference numerals designate like elements throughout the specification.

It will be understood that when an element such as a layer, film, region, or substrate is referred to as being “on” or “connected to” another element, it can be directly on the other element or intervening elements may also be present. In contrast, when an element is referred to as being “directly on” or “directly connected to” another element or layer, there are no intervening elements or layers present. Like numbers refer to like elements throughout. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items. As used herein, “connected” may indicate a physical and/or a electrical connection.

It will be understood that, although the terms first, second, third, etc., may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the invention.

Spatially relative terms, such as “lower,” “upper” and the like, may be used herein for ease of description to describe the relationship of one element or feature to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation, in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as “lower” relative to other elements or features would then be oriented “upper” relative to the other elements or features. Thus, the exemplary term “below” can encompass both an orientation of above and below. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms “a,” “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” and/or “comprising,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

Embodiments of the invention are described herein with reference to cross-section illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of the invention. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, embodiments of the invention should not be construed as limited to the particular shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

All methods described herein can be performed in a suitable order unless otherwise indicated herein or otherwise clearly contradicted by context. The use of any and all examples, or exemplary language (e.g., “such as”), is intended merely to better illustrate the invention and does not pose a limitation on the scope of the invention unless otherwise claimed. No language in the specification should be construed as indicating any non-claimed element as essential to the practice of the invention as used herein.

Hereinafter, the invention will be described in detail with reference to the accompanying drawings.

is a plan view showing an exemplary embodiment of a liquid crystal display, according to the invention.is a cross-sectional view taken along line II-II′ of the liquid crystal display of.is a cross-sectional view taken along line III-III′ of the liquid crystal display of.

Referring to, an exemplary embodiment of a liquid crystal display according to the invention includes a lower paneland an upper panelfacing each other, and a liquid crystal layerinjected therebetween. The liquid crystal display includes a plurality of a pixel area. An exemplary embodiment may include the pixel areas arranged substantially in a matrix shape on the lower panel. A pixel area may be an independent area unit of the liquid crystal display, capable of independently controlling liquid crystal of the liquid crystal layer. First, the lower panelwill be described.

A gate conductor including a plurality of a first gate linea and a plurality of a second gate lineb, and a reference voltage lineare on an insulating substrate. The insulating substratemay include of transparent glass or plastic, etc.

The first and second gate linesa andb includes a wide end portion (not shown) for physical and/or electrical connecting with first and second gate electrodesa andb, respectively, and other layers or an external driving circuit. The first and second gate electrodesa andb, together with a main portion of the first and second gate linesa andb, respectively form a single unitary indivisible first gate linea and second gate lineb.

The first and second gate linesa andb may include aluminum-based metal such as aluminum (Al) or aluminum alloy, etc., silver-based metal such as silver (Ag) or silver alloy, etc., copper-based metal such as copper (Cu) or copper alloy, etc., molybdenum-based metal such as metal, molybdenum (Mo) or molybdenum alloy, etc. chromium (Cr), tantalum (Ta), and titanium (Ti), or the like.

The first and second gate linesa andb may have a multilayer structure, for example, including at least two conductive layer having different physical properties.

Patent Metadata

Filing Date

Unknown

Publication Date

April 14, 2026

Inventors

Unknown

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