Display apparatus

This applicationis a reissue of U.S. patent application Ser. No. 16/575,917, filed Sep. 19, 2019, now U.S Pat. No. 11,063,068, issued Jul. 13, 2021, whichclaims the priority of Korean Patent Application No. 10-2018-0136203 filed on Nov. 7, 2018, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety.

The present disclosure relates to a display apparatus, and more particularly, to a display apparatus in which a plurality of thin film transistors is formed with different semiconductors.

As information technology has developed, a display apparatus has been developed that can represent information contained in an electrical information signals in the form of visual images. Various types of display apparatuses have been developed, some of which have excellent performance characteristics such as thinness, light weight, and/or low power consumption.

Examples of display apparatuses include a liquid crystal display apparatus (LCD) and an electroluminescence display apparatus, such as an organic light emitting display apparatus (OLED) or a quantum-dot light emitting display apparatus (QLED). The electroluminescence display apparatus may be a next-generation display apparatus having a self-emitting characteristic, and may have excellent characteristics in terms of viewing angle, contrast, response speed, and power consumption, as compared with a liquid crystal display apparatus.

An electroluminescence display apparatus may include a display area for displaying images and a non-display area disposed to be adjacent to the display area. A pixel area, which may be disposed in the display area, may include a pixel circuit and a light emitting element. In the pixel circuit, a plurality of thin film transistors may be disposed to drive the light emitting elements.

Thin film transistors may be classified depending on a material used for a semiconductor layer. Among them, a low temperature poly silicon (LTPS) thin film transistor and an oxide semiconductor thin film transistor are most widely used. A technology for an electroluminescence display apparatus in which an LTPS thin film transistor and an oxide semiconductor thin film transistor are formed on the same substrate is actively being developed.

Accordingly, embodiments of the present disclosure are directed to a display apparatus that substantially obviates one or more problems due to limitations and disadvantages of the related art.

The inventors of the present disclosure recognized that in the manufacturing method of a display apparatus, when the plurality of thin film transistors is formed with different semiconductors, operation characteristics of the pixels can be improved.

Therefore, the inventors of the present disclosure invented a display apparatus in which semiconductors of the plurality of thin film transistors may be formed on different layers to form the plurality of thin film transistors with different semiconductors. Also, damage to the semiconductor elements may be reduced.

Therefore, an object of the present disclosure is to provide a thin film transistor and a display apparatus which may reduce the damage to semiconductor elements during the manufacturing of the display apparatus caused by forming a plurality of thin film transistors with different semiconductor materials.

Additional advantages, objects, and features of the disclosure will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the disclosure. The objectives and other advantages of the disclosure may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.

According to an aspect of the present disclosure, a display apparatus includes a substrate including a first substrate, a second substrate, and an inorganic insulating layer between the first substrate and the second substrate; a first buffer layer on the substrate, wherein the first buffer layer includes n+1 layers, and ‘n’ is 0 or an even number; and a first thin film transistor, a second thin film transistor, and a storage capacitor each on the first buffer layer, wherein the first thin film transistor includes a first active layer formed of a low temperature poly silicon material, wherein the second thin film transistor includes a second active layer formed of an oxide semiconductor material, and wherein the storage capacitor includes a first capacitor electrode and a second capacitor electrode.

According to another aspect of the present disclosure, a display apparatus includes a substrate; a first buffer layer on the substrate; a first thin film transistor including: a first active layer formed of a low temperature poly silicon material, a first gate electrode overlapping the first active layer with a first gate insulating layer therebetween, and a first source electrode and a first drain electrode which are electrically connected to the first active layer; a second thin film transistor including: a second active layer formed of an oxide semiconductor, a second gate electrode overlapping the second active layer with a second gate insulating layer therebetween, and a second source electrode and a second drain electrode which are electrically connected to the second active layer; a storage capacitor including a first capacitor electrode on a same layer as the first gate electrode and a second capacitor electrode overlapping the first capacitor electrode with a first interlayer insulating layer therebetween; and a first blocking layer that is an extension of the second capacitor electrode which overlaps the second active layer.

According to another aspect of the present disclosure, a display apparatus includes a substrate; a first buffer layer on the substrate; a first thin film transistor including: a first active layer formed of a low temperature poly silicon material, a first gate electrode overlapping the first active layer with a first gate insulating layer therebetween, and a first source electrode and a first drain electrode which are electrically connected to the first active layer; a second thin film transistor including: a second active layer formed of an oxide semiconductor, a second gate electrode overlapping the second active layer with a second gate insulating layer therebetween, and a second source electrode and a second drain electrode which are electrically connected to the second active layer; a storage capacitor including a first capacitor electrode on a same layer as the first gate electrode and a second capacitor electrode overlapping the first capacitor electrode with a first interlayer insulating layer therebetween; and a first blocking layer that is an extension of the first capacitor electrode which overlaps the second active layer.

Other detailed matters of the example embodiments are included in the detailed description and the drawings.

According to embodiments of the present disclosure, thin film transistors including different semiconductor materials are disposed, thereby improving reliability of the display apparatus.

Further, according to embodiments of the present disclosure, an inorganic layer is formed between two polyimide (PI) to block charges charged in lower polyimide (PI), thereby improving the reliability of the product. Therefore, a process of forming a metal layer to block the charges charged in polyimide PI may be omitted, so that the process may be simplified and the production cost may be reduced.

Further, according to embodiments of the present disclosure, a blocking layer which is integrally formed to be connected to a capacitor electrode is disposed so as to overlap an active layer of the thin film transistor including an oxide semiconductor material, thereby suppressing hydrogen generated in a substrate from being diffused to an active layer. Further, a buffer layer disposed between the blocking layer and the active layer is formed as a multi-layer formed of an upper buffer layer having a relatively low hydrogen content and a lower buffer layer having a relatively high insulation property so that the upper buffer layer which is in contact with a lower surface of the active layer may suppress the hydrogen from being diffused to the active layer of the thin film transistor including the oxide semiconductor material. Further, the lower buffer layer disposed between the blocking layer and the upper buffer may suppress the charges charged in the blocking layer from being transmitted to the active layer of the thin film transistor.

The effects according to the present disclosure are not limited to the contents exemplified above, and more various effects are included in the present specification.

It is to be understood that both the foregoing general description and the following detailed description of the present disclosure are exemplary and explanatory and are intended to provide further explanation of the disclosure as claimed.

Reference will now be made in detail to the example embodiments of the present disclosure, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like parts. Advantages and features of the present disclosure, and implementation methods thereof will be clarified through following embodiments described with reference to the accompanying drawings. The present disclosure may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present disclosure to those skilled in the art. Further, the present disclosure is only defined by scopes of claims.

The shapes, sizes, ratios, angles, numbers, and the like illustrated in the accompanying drawings for describing the example embodiments of the present disclosure are merely examples, and the present disclosure is not limited thereto. Like reference numerals generally denote like elements throughout the specification. Further, in the following description of the present disclosure, a detailed explanation of known related technologies may be omitted to avoid unnecessarily obscuring the subject matter of the present disclosure. The terms such as “including,” “having,” and “consist of” used herein are generally intended to allow other components to be added unless the terms are used with the term “only.” Any references to singular may include plural unless expressly stated otherwise.

Components are interpreted to include an ordinary error range even if not expressly stated.

When the position relation between two parts is described using the terms such as “on,” “above,” “below,” and “next,” one or more parts may be positioned between the two parts unless the terms are used with the term “immediately” or “directly”.

When an element or layer is disposed “on” another element or layer, another layer or another element may be interposed directly on the other element or therebetween.

Although the terms “first,” “second,” and the like are used for describing various components, these components are not confined by these terms. These terms are merely used for distinguishing one component from the other components. Therefore, a first component to be mentioned below may be a second component in a technical concept of the present disclosure.

Like reference numerals generally denote like elements throughout the specification.

A size and a thickness of each component illustrated in the drawing are illustrated for convenience of description, and the present disclosure is not limited to the size and the thickness of the component illustrated.

The features of various embodiments of the present disclosure can be partially or entirely adhered to or combined with each other and can be interlocked and operated in technically various ways, and the embodiments can be carried out independently of or in association with each other.

Hereinafter, a display device according to example embodiments of the present disclosure will be described in detail with reference to accompanying drawings

The display apparatus of the present disclosure may be applied to an electroluminescence display apparatus, such as an organic light emitting display apparatus (OLED) or a quantum-dot light emitting display apparatus (QLED), but is not limited thereto and may be applied to various display apparatuses. For example, the display apparatus of the present disclosure may also be applied to a liquid crystal display apparatus (LCD).

is a cross-sectional view of a display apparatus according to an example embodiment of the present disclosure.

With reference to, a display apparatusaccording to an example embodiment of the present disclosure includes a substrate, a first buffer layer, a first thin film transistor, a second thin film transistor, a storage capacitor, a first gate insulating layer, a first interlayer insulating layer, a second buffer layer, a second gate insulating layer, a second interlayer insulating layer, a first planarizing layer, a second planarizing layer, a first electrode, a connection electrode, a bank, an auxiliary electrode, a spacer, an emission structure, a second electrode, and an encapsulating unit.

The substratemay support various components of the display apparatus. The substratemay be formed of a glass, plastic, or other suitable material having flexibility. When the substrateis formed of a plastic material, for example, polyimide (PI) may be used. When the substrateis formed of polyimide (PI), the manufacturing process of the display apparatus may be performed under a circumstance when a support substrate formed of glass is disposed below the substrate, and the support substrate may be released after completing the manufacturing process of the display apparatus. Further, after releasing the support substrate, a back plate that supports the substratemay be disposed below the substrate.

When the substrateis formed of polyimide (PI), moisture components may pass through the substrateformed of polyimide (PI) to permeate the first thin film transistoror the emission structureso that the performance of the display apparatusmay be deteriorated. The display apparatusaccording to an example embodiment of the present disclosure may be configured by a double polyimide (PI) to suppress the deterioration of the performance of the display apparatusdue to the moisture permeation. Further, an inorganic layer may be formed between two polyimides (PI) to block the moisture components from passing through the upper polyimide (PI), so that the reliability may be further improved.

Further, when the inorganic layer is not formed between two polyimides (PI), charges charged in the lower polyimide (PI) may form a back bias to affect the first thin film transistor. Therefore, in order to block the charges charged in the polyimide (PI), a separate metal layer may need to be formed. However, according to the example embodiment of the present disclosure, an inorganic layer is formed between two polyimides (PI), so that charges charged in lower polyimide (PI) may be blocked, thereby improving the reliability of the product. Further, a process of forming a metal layer to block the charges charged in the polyimide PI may be omitted, so that the process may be simplified and the production cost may be reduced.

It may be very important for a flexible display apparatus using polyimide (PI) as a substrateto ensure environmental reliability and performance reliability of the panel. The display apparatusaccording to the example embodiment of the present disclosure may use double polyimide (PI) as a substrate to help ensure the environmental reliability. For example, as illustrated in, the substrateof the display apparatusmay include a first polyimide layera, a second polyimide layerc, and an inorganic insulating layerb formed between the first polyimide layera and the second polyimide layerc. When the charges are charged in the first polyimide layera, the inorganic insulating layerb may serve to block the charges from affecting the first thin film transistorthrough the second polyimide layerc. Further, the inorganic insulating layerb formed between the first polyimide layera and the second polyimide layerc may serve to block the moisture component from penetrating through the second polyimide layerc.

The inorganic insulating layerb may be formed by a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multi-layer thereof. In the display apparatusaccording to the example embodiment of the present disclosure, the inorganic insulating layerb may be formed of a silicon oxide (SiOx) material. For example, the inorganic insulating layerb may be formed of a silica, silicon dioxide (SiO), or other material. However, the inorganic insulating layerb is not limited thereto, and may be formed by a double layer of silicon dioxide (SiO) and silicon nitride (SiNx).

The first buffer layermay be formed on an entire surface of the substrate. The first buffer layermay be formed by a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multi-layer thereof. The first buffer layermay serve to improve adhesiveness between layers formed on the first buffer layerand the substrateand block alkali components leaked from the substrate. The first buffer layermay be omitted based on a type or a material of the substrateand a structure and a type of a thin film transistor.

According to the example embodiment of the present disclosure, the first buffer layermay be formed as a multi-layer in which silicon dioxide (SiO) and silicon nitride (SiNx) are alternately formed. For example, the first buffer layermay be formed of n+1 layers. Here, n denotes an even number including 0, such as 0, 2, 4, 6, and 8. Therefore, when n is 0, the first buffer layeris formed as a single layer. Further, the first buffer layermay be silicon nitride (SiNx) or silicon oxide (SiOx). When n is 2, the first buffer layermay be formed as a triple layer. When the first buffer layeris formed as a triple layer, an upper layer and a lower layer may be silicon oxide (SiOx), and an intermediate layer disposed between the upper layer and the lower layer may be silicon nitride (SiNx). When n is 4, the first buffer layermay be formed as a five-layered structure. When the first buffer layeris formed as a five-layered structure, as illustrated in, a-a-th buffer layera may be formed on the substrate. Further, the-a-th buffer layera may be formed of a silicon dioxide (SiO) material. Further, a-b-th buffer layerb may be formed of a silicon nitride (SiNx) material and disposed on the-a-th buffer layera. Further, a-c-th buffer layerc may be formed of a silicon dioxide (SiO) material and disposed on the-b-th buffer layerb. Further, a-d-th buffer layerd may be formed of a silicon nitride (SiNx) material and disposed on the-c-th buffer layerc. Further, a-e-th buffer layere may be formed of a silicon dioxide (SiO) material and disposed on the-d-th buffer layerd. As described above, when n is an even number which is equal to or larger than 2, the first buffer layermay be formed as a multi-layer in which silicon oxide (SiOx) and silicon nitride (SiNx) are alternately formed. Further, an uppermost layer and a lowermost layer of the first buffer layerformed as a multi-layer may be formed of a silicon oxide (SiOx) material. For example, the first buffer layerformed of a plurality of layers may include an upper layer which is in contact with a first active layerof the first thin film transistor, a lower layer which is in contact with the substrate, and an intermediate layer disposed between the upper layer and the lower layer. The upper layer and the lower layer may be formed of a silicon oxide (SiOx) material. Further, the upper layer of the first buffer layerformed as a multi-layer may be formed to be thicker than the lower layer and the intermediate layer. A thickness of the upper layer of the first buffer layerformed of a plurality of layers which is in contact with the first active layerof the first thin film transistormay be larger than thicknesses of the lower layer and the intermediate layer of the first buffer layer. For example, as illustrated in, when the first buffer layeris a five-layered structure, the-e-th buffer layere which is in contact with the first active layermay be the upper layer. Further, the-a-th buffer layera which is in contact with the substratemay be the lower layer. Furthermore, the-b-th buffer layerb, the-c-th buffer layerc, and the-d-th buffer layerd which are disposed between the-a-th buffer layera and the-e-th buffer layere may be intermediate layers. Here, a thickness of the-e-th buffer layere which is an upper layer may be larger than the thickness of the-a-th buffer layera which is a lower layer and the thicknesses of the-b-th buffer layerb, the-c-th buffer layerc, and the-d-th buffer layerd which are intermediate layers. In an example, the thickness of the-e-th buffer layere may be 3000 Å, and the thickness of the-a-th buffer layera may be 1000 Å. Further, the thicknesses of the-b-th buffer layerb, the-c-th buffer layerc, and the-d-th buffer layerd may be 1000 Å.

In the first buffer layerformed of a plurality of layers, a plurality of layers other than the upper layer which is in contact with the first active layerof the first thin film transistormay have the same thickness. For example, the thicknesses of the-a-th buffer layera, the-b-th buffer layerb, the-c-th buffer layerc, and the-d-th buffer layerd (excluding the-e-th buffer layere which is in contact with the first active layer) may be equal to each other.

The first thin film transistormay be disposed on the first buffer layer. The first thin film transistormay include the first active layer, a first gate electrode, a first source electrode, and a first drain electrode. Here, depending on the design of the pixel circuit, the first source electrodemay serve as a drain electrode, and the first drain electrodemay serve as a source electrode. The first active layerof the first thin film transistormay be disposed on the first buffer layer.

The first active layermay include a low temperature poly silicon (LTPS). Such a polysilicon material may have a high mobility (100 cm/Vs or higher) so that energy power consumption is low and reliability is excellent. Therefore, the polysilicon material may be applied to a gate driver for driving elements which drive thin film transistors for a display element and/or a multiplexer (MUX), and also applied as an active layer of a driving thin film transistor of the display apparatus according to the example embodiment, but is not limited thereto. For example, the polysilicon material may be applied as an active layer of a switching thin film transistor depending on the characteristics of the display apparatus. An amorphous silicon (a-Si) material is deposited on the first buffer layer, a dehydrogenation process and a crystallization process are performed to form polysilicon, and the polysilicon is patterned to form the first active layer.

The first active layermay include a first channel regiona in which a channel is formed at the time of driving the first thin film transistor, and a first source regionb and a first drain regionc at both sides of the first channel regiona. The first source regionb refers to a part of the first active layerwhich is connected to the first source electrode, and the first drain regionc refers to a part of the first active layerwhich is connected to the first drain electrode. The first source regionb and the first drain regionc may be configured by ion doping (impurity doping) of the first active layer. The first source regionb and the first drain regionc may be produced by doping ions into the polysilicon material, and the first channel regiona may refer to a part that is not doped with ions and remains with the polysilicon material.

The first gate insulating layermay be disposed on the first active layerof the first thin film transistor. The first gate insulating layermay be formed as a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multi-layer thereof. In the first gate insulating layer, a contact hole may be formed. And, the first source electrodeand the first drain electrodeof the first thin film transistorare connected to the first source regionb and the first drain regionc of the first active layerof the first thin film transistorthrough the contact hole, respectively.

The first gate electrodeof the first thin film transistorand a first capacitor electrodeof the storage capacitormay be disposed on the first gate insulating layer.

The first gate electrodeand the first capacitor electrodemay be formed as a single layer or a multi-layer formed of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chrome (Cr), gold (Au), nickel (Ni), and neodymium (Nd), or an alloy thereof. The first gate electrodemay be formed on the first gate insulating layerto overlap the first channel regiona of the first active layerof the first thin film transistor. The first capacitor electrodemay be omitted based on a driving characteristic of the display apparatusand a structure and a type of the thin film transistor. The first gate electrodeand the first capacitor electrodemay be formed by the same process. Further, the first gate electrodeand the first capacitor electrodemay be formed of the same material on the same layer.

The first interlayer insulating layermay be disposed on the first gate insulating layer, the first gate electrode, and the first capacitor electrode. The first interlayer insulating layermay be configured by a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multi-layer thereof. A contact hole through which the first source regionb and the first drain regionc of the first active layerof the first thin film transistorare exposed may be formed in the first interlayer insulating layer.

A second capacitor electrodeof the storage capacitormay be disposed on the first interlayer insulating layer. The second capacitor electrodemay be formed as a single layer or a multi-layer formed of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chrome (Cr), gold (Au), nickel (Ni), and neodymium (Nd), or an alloy thereof. The second capacitor electrodemay be formed on the first interlayer insulating layerto overlap the first capacitor electrode. The second capacitor electrodemay be formed of the same material as the first capacitor electrode. The second capacitor electrodemay be omitted based on a driving characteristic of the display apparatusand a structure and a type of the thin film transistor.

The second buffer layermay be disposed on the first interlayer insulating layerand the second capacitor electrode. The second buffer layermay be configured as a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multi-layer thereof. A contact hole through which the first source regionb and the first drain regionc of the first active layerof the first thin film transistorare exposed may be formed in the second buffer layer. Further, the contact hole may be formed. And, the second capacitor electrodeof the storage capacitoris exposed though the contact hole.